Abstract:
Methods, systems, and apparatuses are described for performing speaker-identification-assisted speech processing in a downlink path of a communication device. In accordance with certain embodiments, a communication device includes speaker identification (SID) logic that is configured to identify the identity of a far-end speaker participating in a voice call with a user of the communication device. Knowledge of the identity of the far-end speaker is then used to improve the performance of one or more downlink speech processing algorithms implemented on the communication device.
Abstract:
A plurality of encrypted packets having common payload data are received, wherein each of the plurality of encrypted packets includes a corresponding parity check field, and wherein a corresponding parity check syndrome for each of the plurality of encrypted packets indicates at least one bit error. A payload portion of each of the plurality of encrypted packets is decrypted to generate a plurality of decrypted payload portions. At least one chase coding technique is used to generate a corrected decrypted payload, based on at least one candidate bit error position and further based on the corresponding parity check syndrome for at least one of the plurality of encrypted packets.
Abstract:
Methods, systems, and apparatuses are provided for performing joint source channel decoding in a manner that exploits parameter domain correlation. Redundancy in speech coding and packet field parameters is exploited to generate conditional probabilities that a decoder utilizes to perform joint source channel decoding. The conditional probabilities are based upon correlations of parameters of a current frame with parameters of the same or other frames or historical parameter data. Parameter domain correlation provides significant channel decoding improvement over prior bit domain solutions. Also provided are methods, systems, and apparatuses for utilizing received statistics of monitored data bits from which conditional probabilities are generated to perform channel decoding. The techniques described may be implemented at the decoder side and thus do not interfere with transmission standards.
Abstract:
Low complexity error correction using cyclic redundancy check (CRC). Communications between at communication devices, sometimes including at least one redundant transmission from a transmitter to a receiver, undergo low complexity error correction. CRC may be employed in conjunction with using any desired type of ECC or using uncoded modulation. Based on CRC determined bit-errors, as few as a singular syndrome associated with a singular bit-error or a linear combination of syndromes associated with two or more singular bit-errors within two or more received signal sequences are employed to perform error correction of the received signal. Real time combinations of multiple syndromes associated with respective single bit-errors (that may themselves be calculated off-line) are employed in accordance with error correction. In addition to CRC, any ECC may be employed including convolutional code, RS code, turbo code, TCM code, TTCM code, LDPC code, or BCH code.
Abstract:
Methods, systems, and apparatuses are described for performing speaker-identification-assisted speech processing. In accordance with certain embodiments, a communication device includes speaker identification (SID) logic that is configured to identify a user of the communication device and/or the identity of a far-end speaker participating in a voice call with a user of the communication device. Knowledge of the identity of the user and/or far-end speaker is then used to improve the performance of one or more speech processing algorithms implemented on the communication device.
Abstract:
Methods, systems, and apparatuses are described for performing speaker-identification-assisted speech processing in an uplink path of a communication device. In accordance with certain embodiments, a communication device includes speaker identification (SID) logic that is configured to identify the identity of a near-end speaker. Knowledge of the identity of the near-end speaker is then used to improve the performance of one or more uplink speech processing algorithms implemented on the communication device.
Abstract:
Low complexity error correction using cyclic redundancy check (CRC). Communications between communication devices, sometimes including at least one redundant transmission from a transmitter to a receiver, undergo low complexity error correction. CRC may be employed in conjunction with using any desired type of ECC or using uncoded modulation. Based on CRC determined bit-errors, as few as a singular syndrome associated with a singular bit-error or a linear combination of syndromes associated with two or more singular bit-errors within two or more received signal sequences are employed to perform error correction of the received signal. Real time combinations of multiple syndromes associated with respective single bit-errors (that may themselves be calculated off-line) are employed in accordance with error correction. In addition to CRC, any ECC may be employed including convolutional code, RS code, turbo code, TCM code, TTCM code, LDPC code, or BCH code.
Abstract:
Methods, systems, and apparatuses are described for performing speaker-identification-assisted speech processing in an uplink path of a communication device. In accordance with certain embodiments, a communication device includes speaker identification (SID) logic that is configured to identify the identity of a near-end speaker. Knowledge of the identity of the near-end speaker is then used to improve the performance of one or more uplink speech processing algorithms implemented on the communication device.
Abstract:
Methods, systems, and apparatuses are provided for performing jitter buffer enhanced joint source channel decoding. Jitter buffer enhanced joint source channel decoding may be performed in a manner that exploits parameter domain correlation. A jitter buffer stores hard bits of properly channel decoded packets, and a secondary jitter buffer is implemented to store soft bits associated with packets that are improperly channel decoded. Joint source channel decoding may be delayed to perform channel decoding of a frame in the penultimate position of the jitter buffer. The soft bits stored in the secondary jitter buffer as well as hard bits stored in the jitter buffer, which may include future frames, are utilized to perform channel decoding. The delayed jitter buffer enhanced joint source channel decoding may also be extended to iteratively perform channel decoding for giving frames at each position in the jitter buffer as they traverse the jitter buffer.
Abstract:
A modem architecture that supports the application of joint source channel decoding (JSCD). The modem architecture includes two channel decoders, one of which is modified to provide improved signal quality. The modem architecture further includes transparent network layers that enable the passage of data from one layer to another layer. For example, the modem architecture enables the passage soft bits, when available, from a physical layer to an application layer. The soft bits may be utilized for JSCD, packet loss concealment, or other applications. The modem architecture enables encryption and decryption of data to incorporate extrinsic information in operating JSCD.