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公开(公告)号：US20230041639A1
公开(公告)日：2023-02-09
申请号：US17792264
申请日：2021-09-01
发明人： Wenjie Hou , Yingmeng Miao , Qiujie Su , Chongyang Zhao , Feng Qu
IPC分类号： G02F1/1362
摘要： Provided are an array substrate and a manufacturing method thereof, and a display device. The array substrate comprises a plurality of data lines and sub-pixels. At least one sub-pixel comprises: a first insulating layer; a gate; an active layer located on one side of the first insulating layer away from the gate; a pixel electrode; a first electrode located connected to the active layer and in contact with the pixel electrode; a second electrode connected to the active layer and a data line; a second insulating layer having a first opening, wherein the orthographic projection of the first opening partially overlaps with the orthographic projections of the pixel electrode and the first electrode; a connection electrode in contact with the pixel electrode and the first electrode through the first opening; and a common electrode located on one side of the second insulating layer away from the pixel electrode.
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公开(公告)号：US10134350B2
公开(公告)日：2018-11-20
申请号：US15652493
申请日：2017-07-18
发明人： Qiujie Su
摘要： The embodiments of the present disclosure provide a shift register unit, a method for driving the shift register unit, a gate driving circuit and a display apparatus. The shift register unit comprises a first input module, a first output module, a first reset module, a first storage module and a second reset module. The first input module is configured to output a first pull-up signal to the first output module based on a first input signal. The first output module is configured to output an output signal based on the first pull-up signal and a first clock signal. The first storage module is configured to store the first pull-up signal. The first reset module is configured to reset the first storage module based on a first reset signal. The second reset module is configured to reset the output from the first output module based on a second reset signal. The second reset signal is set to be valid while the first pull-up signal and the first clock signal are valid and a duration in which the second reset signal is valid is shorter than a duration in which the first clock signal is valid.
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公开(公告)号：US11296123B2
公开(公告)日：2022-04-05
申请号：US15779222
申请日：2017-09-29
发明人： Ning Zhu , Qiujie Su , Chongyang Zhao
IPC分类号： H01L27/12
摘要： An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate includes common electrodes, multiple first common electrode lines and multiple second common electrode lines. The multiple first common electrode lines intersect with the multiple second common electrode lines to form grids. The multiple first common electrode lines are connected with the common electrodes through first via-holes and the multiple second common electrode lines are connected with the common electrodes through second via-holes.
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公开(公告)号：US20220084451A1
公开(公告)日：2022-03-17
申请号：US17341756
申请日：2021-06-08
发明人： Zhihua Sun , Yinlong Zhang , Qiujie Su , Feng Qu , Jing Liu , Yanping Liao , Xibin Shao
IPC分类号： G09G3/20
摘要： Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.
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公开(公告)号：US11158224B2
公开(公告)日：2021-10-26
申请号：US16077992
申请日：2018-02-22
发明人： Feng Li , Baoqiang Wang , Qiujie Su
IPC分类号： G09G3/20
摘要： A start signal generation circuit, a driving method and a display device are provided. The start signal generation circuit includes: a pull-down node control sub-circuit; a pull-up control node control sub-circuit, configured to control a potential of the pull-up control node under the control of voltage signals from a first clock signal input terminal, a second clock signal input terminal, and the 2nth clock signal input terminal; a pull-up node control sub-circuit; a storage sub-circuit, connected between the pull-up node PU and a start signal output terminal; and a start signal output sub-circuit, where n is an integer larger than 1, and smaller than or equal to N, N is an integer larger than 1.
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公开(公告)号：US20170235406A1
公开(公告)日：2017-08-17
申请号：US15222531
申请日：2016-07-28
CPC分类号： G06F3/0416 , G06F3/0412 , G09G3/3266 , G09G3/3677 , G09G5/003 , G09G2230/00 , G09G2300/0408 , G09G2310/0286 , G11C19/28
摘要： The present disclosure provides a gate driving circuit in which a node potential compensation unit connected to a touch switch terminal is provided between pull-up nodes of two stages of shift register units of each preset unit group. The node potential compensation unit may compensate for, under the control of both of a pull-up node of a previous stage of shift register unit and the touch switch terminal, a potential of a pull-up node of a next stage of shift register unit, and may enable the potential of the pull-up node of the next stage of shift register unit to be in a stable state, so as to improve the stability of the potential of the gate turn-on signal output by the next stage of shift register unit, thereby enabling a TFT of a pixel region in a corresponding line to be normally turned on and improving a display performance.
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公开(公告)号：US20210405488A1
公开(公告)日：2021-12-30
申请号：US16765940
申请日：2019-06-28
发明人： Qiujie Su , Xibin Shao
IPC分类号： G02F1/1362 , G02F1/1368
摘要： The present disclosure provides a display substrate and a liquid crystal panel. The display substrate includes: a substrate; and a common electrode and a pixel electrode array layer which are located on a side of the substrate and are spaced by insulation, wherein the common electrode includes a transparent conductive layer; the pixel electrode array layer includes a plurality of pixel electrode groups arranged in a column direction, wherein each of the pixel electrode groups includes two rows of pixel electrodes, two gate lines extending along a row direction and arranged in the column direction is provided between two adjacent pixel electrode groups, and each of the gate lines is connected to a plurality of thin film transistors, each of the pixel electrodes is connected to one of the thin film transistors; an orthographic projection of a gap, which is between two pixel electrodes adjacent in the column direction of the pixel electrode group, on the substrate falls within an orthographic projection of the common electrode on the substrate.
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公开(公告)号：US20210074774A1
公开(公告)日：2021-03-11
申请号：US17016511
申请日：2020-09-10
发明人： Qiujie Su , Zhihua Sun
IPC分类号： H01L27/32
摘要： The embodiments of the present disclosure provide a display panel and a display apparatus. The display panel includes: a first substrate; a plurality of sub-pixels arranged in an array on the substrate, the plurality of sub-pixels comprising a first type of sub-pixels and a second type of sub-pixels; and at least one data line, each of which is disposed between adjacent columns of sub-pixels of the array and extending along a second direction, an overlapped area of projection of each data line on the first substrate and projection of the first type of sub-pixels on the first substrate has a first width, and an overlapped area of the projection of each data line on the first substrate and projection of the second type of sub-pixels on the first substrate has a second width less than the first width.
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公开(公告)号：US10170068B2
公开(公告)日：2019-01-01
申请号：US15519836
申请日：2016-08-30
IPC分类号： G09G3/36 , G06F3/0354
摘要： The embodiments of the present disclosure provide a gate driving circuit, an array substrate, a display panel and a driving method. The gate driving circuit comprises: at least a Gate driver on Array (GOA) unit GOAn and a GOA unit GOAn+m, an output terminal of GOAn being connected to an input terminal of GOAn+m, an output terminal of GOAn+m is connected to a reset terminal of GOAn; and an electrical leakage compensation module having two input terminals connected to output terminals of GOAn and GOAn+m, respectively, a control terminal connected to a signal line, and an output terminal connected to a Pull-Up (PU) node of GOAn+m, and configured to compensate for a voltage at the PU node of GOAn+m in response to receipt of the electrical leakage compensation signal VLHB. According to the embodiments of the present disclosure, an electrical leakage compensation module is added between two cascaded GOA units for compensating for a voltage decrease due to electrical leakage by charging the GOA unit at the next stage.
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公开(公告)号：US10037103B2
公开(公告)日：2018-07-31
申请号：US15222531
申请日：2016-07-28
CPC分类号： G06F3/0416 , G06F3/0412 , G09G3/3266 , G09G3/3677 , G09G5/003 , G09G2230/00 , G09G2300/0408 , G09G2310/0286 , G11C19/28
摘要： The present disclosure provides a gate driving circuit in which a node potential compensation unit connected to a touch switch terminal is provided between pull-up nodes of two stages of shift register units of each preset unit group. The node potential compensation unit may compensate for, under the control of both of a pull-up node of a previous stage of shift register unit and the touch switch terminal, a potential of a pull-up node of a next stage of shift register unit, and may enable the potential of the pull-up node of the next stage of shift register unit to be in a stable state, so as to improve the stability of the potential of the gate turn-on signal output by the next stage of shift register unit, thereby enabling a TFT of a pixel region in a corresponding line to be normally turned on and improving a display performance.
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