公开(公告)号：US11158736B2

公开(公告)日：2021-10-26

申请号：US16890151

申请日：2020-06-02

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Tse-Huang Lo

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

Abstract: A MOSFET structure and a manufacturing method thereof are provided. The structure includes a substrate, a well region of a first conductivity type, a first trench formed on a surface of the well region of the first conductivity type and extending downwards to a well region of a second conductivity type, a source disposed in the well region of the second conductivity type and under the first trench, a gate oxide layer disposed on an inner surface of the first trench, a polysilicon gate disposed on the gate oxide layer, a conductive plug extending downwards from above the first trench and being in contact with the well region of the second conductivity type after extending through the source, an insulation oxide layer filled in the first trench between the conductive plug and the polysilicon gate, and a drain disposed outside the first trench and obliquely above the source.

公开(公告)号：US11075292B2

公开(公告)日：2021-07-27

申请号：US16864263

申请日：2020-05-01

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Tse-Huang Lo

IPC: H01L29/739 ,  H01L21/265 ,  H01L21/027 ,  H01L21/28 ,  H01L21/306 ,  H01L21/3213 ,  H01L21/762 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

Abstract: An insulated gate bipolar transistor includes a substrate; a first conductivity type base disposed on the substrate and having a first trench; a first conductivity type buffer region disposed in the first conductivity type base; a collector doped region having a second conductivity type and disposed in the first conductivity type base; a second conductivity type base to which the first trench extends downwardly; a gate oxide layer disposed on an inner surface of the first trench; a polysilicon gate disposed inside the gate oxide layer; an emitter doped region having a first conductivity type and disposed in the second conductivity type base and under the first trench; a conductive plug extending downwardly from above the first trench and contacting the second conductivity type base; and an insulating oxide layer filled in the first trench, the insulating oxide layer insulating and isolating the polysilicon gate from the emitter doped region.