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公开(公告)号:US12009829B2
公开(公告)日:2024-06-11
申请号:US17980146
申请日:2022-11-03
Inventor: John L. Melanson , Lingli Zhang , Paul M. Astrachan , James Kelton
CPC classification number: H03M1/06 , H03M1/0607 , H03M1/0626 , H03M1/1023
Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.
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公开(公告)号:US12047086B2
公开(公告)日:2024-07-23
申请号:US17980105
申请日:2022-11-03
Inventor: Paul M. Astrachan , Lingli Zhang , John L. Melanson , James Kelton
CPC classification number: H03M1/06 , H03M1/0607 , H03M1/0626 , H03M1/1023 , H03M1/66 , H03M1/74 , H03M1/80
Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps comprising a respective input resistance, and control circuitry configured to selectively enable and selectively disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter.
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