End-face coupling structures within electrical backend

    公开(公告)号:US11675128B2

    公开(公告)日:2023-06-13

    申请号:US17249060

    申请日:2021-02-18

    CPC classification number: G02B6/122 G02B6/13

    Abstract: End-face coupling structures within an electrical backend are provided via photonic integrated circuit (PIC), comprising: a first plurality of spacer layers; a second plurality of etch-stop layers, wherein each etch-stop layer of the second plurality of etch-stop layers is located between two spacer layers of the first plurality of spacer layers; and an optical coupler comprising a plurality of waveguides arranged as a waveguide array configured to receive an optical signal in a direction of travel, wherein each waveguide of the plurality of waveguides is located at a layer interface defined between an etch-stop layer and a spacer layer. Portions of the PIC can be formed by depositing layers of spacer and etch-stop materials in which cavities are formed to define the waveguides when the waveguide material is deposited or interconnects when a metal is deposited therein.

    Multimode-interference waveguide crossings

    公开(公告)号:US11294119B1

    公开(公告)日:2022-04-05

    申请号:US16952992

    申请日:2020-11-19

    Abstract: Embodiments include a multimode interference (MMI) device with offset facets. The MMI device includes a first set of facets positioned on opposite edges of the MMI device with an optical path between the set of facets. The MMI device also includes a second set of facets positioned on opposite edges of the MMI device, where the second set of facets are offset from the first set of facets, where a second optical path passes through the MMI device between the second set of facets.

    End-face coupling structures within electrical backend

    公开(公告)号:US12025831B2

    公开(公告)日:2024-07-02

    申请号:US18297373

    申请日:2023-04-07

    CPC classification number: G02B6/122 G02B6/13 G02B6/132 G02B6/136

    Abstract: End-face coupling structures within an electrical backend are provided via photonic integrated circuit (PIC), comprising: a first plurality of spacer layers; a second plurality of etch-stop layers, wherein each etch-stop layer of the second plurality of etch-stop layers is located between two spacer layers of the first plurality of spacer layers; and an optical coupler comprising a plurality of waveguides arranged as a waveguide array configured to receive an optical signal in a direction of travel, wherein each waveguide of the plurality of waveguides is located at a layer interface defined between an etch-stop layer and a spacer layer. Portions of the PIC can be formed by depositing layers of spacer and etch-stop materials in which cavities are formed to define the waveguides when the waveguide material is deposited or interconnects when a metal is deposited therein.

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