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1.发明授权Using a multiple stage memory address translation structure to manage protected micro-contexts 有权使用多级存储器地址转换结构来管理受保护的微环境公开(公告)号：US08560806B2
公开(公告)日：2013-10-15
申请号：US11967458
申请日：2007-12-31
CPC分类号： G06F12/1009 , G06F9/461 , G06F12/1036 , G06F12/109 , G06F12/145 , G06F2212/651
摘要： Embodiments of an invention for using a memory address translation structure to manage protected micro-contexts are disclosed. In one embodiment, an apparatus includes an interface and memory management logic. The interface is to perform a transaction to fetch information from a memory. The memory management logic is to translate an untranslated address to a memory address. The memory management logic includes a storage location, a series of translation stages, and determination logic. The storage location is to store an address of a data structure for the first translation stage. Each of the translation stages includes translation logic to find an entry in a data structure based on a portion of the untranslated address. Each entry is to store an address of a different data structure for the first translation stage, an address of a data structure for a successive translation stage, or the physical address. The determination logic is to determine whether an entry is storing an address of a different data structure for the first translation stage.
摘要翻译： 公开了使用存储器地址转换结构来管理受保护的微上下文的发明的实施例。 在一个实施例中，一种装置包括接口和存储器管理逻辑。 该接口是执行一个事务来从内存中获取信息。 存储器管理逻辑将非翻译地址转换为存储器地址。 存储器管理逻辑包括存储位置，一系列转换级和确定逻辑。 存储位置是存储用于第一翻译阶段的数据结构的地址。 每个翻译阶段包括翻译逻辑，以基于未翻译地址的一部分在数据结构中找到条目。 每个条目是存储用于第一翻译阶段的不同数据结构的地址，用于连续翻译阶段的数据结构的地址或物理地址。 确定逻辑是确定条目是否存储用于第一翻译阶段的不同数据结构的地址。
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2.发明授权Method and apparatus for run-time in-memory patching of code from a service processor 有权从服务处理器的代码运行时内存补丁的方法和装置公开(公告)号：US08286238B2
公开(公告)日：2012-10-09
申请号：US11540373
申请日：2006-09-29
IPC分类号： H04L29/06
CPC分类号： G06F8/656
摘要： Methods and apparatuses enable in-memory patching of a program loaded in volatile memory. A service processor identifies a program to be patched and an associated patch for the program. The patch is loaded into memory, including applying relocation fix-ups to the patch. The service processor directs the program to the patch in place of the segment of the program to be patched. The program implements the patch while maintaining program state, and without suspending execution of the program.
摘要翻译： 方法和装置使得能够在加载在易失性存储器中的程序的内存中修补。 服务处理器识别要修补的程序和程序的相关修补程序。 修补程序加载到内存中，包括将修补程序应用于修补程序。 服务处理器将程序引导到补丁代替要修补的程序的段。 该程序在维护程序状态的同时实现补丁，并且不会暂停程序的执行。
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3.发明申请USING A MEMORY ADDRESS TRANSLATION STRUCTURE TO MANAGE PROTECTED MICRO-CONTEXTS 有权使用存储器地址转换结构来管理保护的MICR-CONTEXTS公开(公告)号：US20090172341A1
公开(公告)日：2009-07-02
申请号：US11967458
申请日：2007-12-31
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F9/461 , G06F12/1036 , G06F12/109 , G06F12/145 , G06F2212/651
摘要： Embodiments of an invention for using a memory address translation structure to manage protected micro-contexts are disclosed. In one embodiment, an apparatus includes an interface and memory management logic. The interface is to perform a transaction to fetch information from a memory. The memory management logic is to translate an untranslated address to a memory address. The memory management logic includes a storage location, a series of translation stages, and determination logic. The storage location is to store an address of a data structure for the first translation stage. Each of the translation stages includes translation logic to find an entry in a data structure based on a portion of the untranslated address. Each entry is to store an address of a different data structure for the first translation stage, an address of a data structure for a successive translation stage, or the physical address. The determination logic is to determine whether an entry is storing an address of a different data structure for the first translation stage.
摘要翻译： 公开了使用存储器地址转换结构来管理受保护的微上下文的发明的实施例。 在一个实施例中，一种装置包括接口和存储器管理逻辑。 该接口是执行一个事务来从内存中获取信息。 存储器管理逻辑将非翻译地址转换为存储器地址。 存储器管理逻辑包括存储位置，一系列转换级和确定逻辑。 存储位置是存储用于第一翻译阶段的数据结构的地址。 每个翻译阶段包括翻译逻辑，以基于未翻译地址的一部分在数据结构中找到条目。 每个条目是存储用于第一翻译阶段的不同数据结构的地址，用于连续翻译阶段的数据结构的地址或物理地址。 确定逻辑是确定条目是否存储用于第一翻译阶段的不同数据结构的地址。
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4.发明申请Method and apparatus for run-time in-memory patching of code from a service processor 有权从服务处理器的代码运行时内存补丁的方法和装置公开(公告)号：US20080083030A1
公开(公告)日：2008-04-03
申请号：US11540373
申请日：2006-09-29
IPC分类号： G06F12/14
CPC分类号： G06F8/656
摘要： Methods and apparatuses enable in-memory patching of a program loaded in volatile memory. A service processor identifies a program to be patched and an associated patch for the program. The patch is loaded into memory, including applying relocation fix-ups to the patch. The service processor directs the program to the patch in place of the segment of the program to be patched. The program implements the patch while maintaining program state, and without suspending execution of the program.
摘要翻译： 方法和装置使得能够在加载在易失性存储器中的程序的内存中修补。 服务处理器识别要修补的程序和程序的相关修补程序。 修补程序加载到内存中，包括将修补程序应用于修补程序。 服务处理器将程序引导到补丁代替要修补的程序的段。 该程序在维护程序状态的同时实现补丁，并且不会暂停程序的执行。
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5.发明申请TRANSITIONING BETWEEN SOFTWARE COMPONENT PARTITIONS USING A PAGE TABLE POINTER TARGET LIST 审中-公开软件组件分段之间的转换使用一个页表指针目标列表公开(公告)号：US20090172346A1
公开(公告)日：2009-07-02
申请号：US11967500
申请日：2007-12-31
IPC分类号： G06F9/26
CPC分类号： G06F12/145 , G06F9/5077
摘要： Embodiments of apparatuses, articles, methods, and systems for intra-partitioning components within an execution environment, and transitioning between partitions using a page table pointer target list are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 这里一般地描述使用页表指针目标列表在执行环境内进行分区内组件的设备，物品，方法和系统的实施例以及在分区之间的转换。 可以描述和要求保护其他实施例。
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公开(公告)号：US09501668B2
公开(公告)日：2016-11-22
申请号：US14036263
申请日：2013-09-25
申请人： Siddhartha Chhabra , Uday R. Savagaonkar , Prashant Dewan , David M. Durham , Balaji Vembu , Xiaozhu Kang , Scott Janus , Jason Martin , Vincent R. Scarlata
发明人： Siddhartha Chhabra , Uday R. Savagaonkar , Prashant Dewan , David M. Durham , Balaji Vembu , Xiaozhu Kang , Scott Janus , Jason Martin , Vincent R. Scarlata
IPC分类号： H04N7/167 , G06F21/82 , G06F21/84 , G06F21/85 , H04N21/41 , H04N21/4143 , H04N21/4367
CPC分类号： G06F21/82 , G06F21/84 , G06F21/85 , H04N21/4122 , H04N21/4143 , H04N21/4367
摘要： Systems and methods for secure delivery of output surface bitmaps to a display engine. An example processing system comprises: an architecturally protected memory; and a processing core communicatively coupled to the architecturally protected memory, the processing core comprising a processing logic configured to implement an architecturally-protected execution environment by performing at least one of: executing instructions residing in the architecturally protected memory and preventing an unauthorized access to the architecturally protected memory; wherein the processing logic is further configured to provide a secure video output path by generating an output surface bitmap encrypted with a first encryption key and storing an encrypted first encryption key in an external memory, wherein the encrypted first encryption key is produced by encrypting the first encryption key with a second encryption key.
摘要翻译： 用于将输出表面位图安全传递到显示引擎的系统和方法。 一个示例处理系统包括：架构受保护的存储器; 以及处理核心，其通信地耦合到所述体系结构保护的存储器，所述处理核心包括处理逻辑，所述处理逻辑被配置为通过执行以下中的至少一个来实现架构保护的执行环境：执行驻留在所述体系结构保护的存储器中的指令， 建筑保护记忆; 其中所述处理逻辑还被配置为通过生成用第一加密密钥加密并将加密的第一加密密钥存储在外部存储器中的输出表面位图来提供安全视频输出路径，其中所述加密的第一加密密钥是通过加密所述第一加密密钥 具有第二加密密钥的加密密钥。
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公开(公告)号：US09092644B2
公开(公告)日：2015-07-28
申请号：US13976935
申请日：2011-12-28
申请人： Alpa T. Narendra Trivedi , David M. Durham , Men Long , Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas
发明人： Alpa T. Narendra Trivedi , David M. Durham , Men Long , Siddhartha Chhabra , Uday R. Savagaonkar , Carlos V. Rozas
CPC分类号： G06F21/64 , G06F12/1408 , G06F21/78 , G06F21/79 , H04L9/0643 , H04L2209/12
摘要： A method and system to provide an effective, scalable and yet low-cost solution for Confidentiality, Integrity and Replay protection for sensitive information stored in a memory and prevent an attacker from observing and/or modifying the state of the system. In one embodiment of the invention, the system has strong hardware protection for its memory contents via XTS-tweak mode of encryption where the tweak is derived based on “Global and Local Counters”. This scheme offers to enable die-area efficient Replay protection for any sized memory by allowing multiple counter levels and facilitates using small counter-sizes to derive the “tweak” used in the XTS encryption without sacrificing cryptographic strength.
摘要翻译： 一种方法和系统，为存储在存储器中的敏感信息提供有效，可扩展且低成本的保密性，完整性和重放保护解决方案，并防止攻击者观察和/或修改系统的状态。 在本发明的一个实施例中，系统通过经由XTS调整加密模式对其存储器内容具有强大的硬件保护，其中基于“全局和本地计数器”导出调整。 该方案提供了通过允许多个计数器级别为任何大小的存储器提供芯片区域高效的重放保护，并有助于使用小型计数器来导出XTS加密中使用的“调整”，而不会牺牲加密强度。
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8.发明申请公开(公告)号：US20140101461A1
公开(公告)日：2014-04-10
申请号：US13646105
申请日：2012-10-05
申请人： Siddhartha Chhabra , Uday R. Savagaonkar , David M. Durham , Niranjan L. Cooray , Men Long , Carlos V. Rozas , Alpa T. Narendra Trivedi
发明人： Siddhartha Chhabra , Uday R. Savagaonkar , David M. Durham , Niranjan L. Cooray , Men Long , Carlos V. Rozas , Alpa T. Narendra Trivedi
IPC分类号： G06F12/14
CPC分类号： G06F12/1408 , G06F21/71
摘要： A processor includes a memory encryption engine that provides replay and confidentiality protections to a memory region. The memory encryption engine performs low-overhead parallelized tree walks along a counter tree structure. The memory encryption engine upon receiving an incoming read request for the protected memory region, performs a dependency check operation to identify dependency between the incoming read request and an in-process request and to remove the dependency when the in-process request is a read request that is not currently suspended.
摘要翻译： 处理器包括为存储器区域提供重放和保密性保护的存储器加密引擎。 存储器加密引擎沿着计数器树结构执行低架构并行化的树行走。 存储器加密引擎在接收到对受保护的存储器区域的传入读取请求时，执行依赖性检查操作以识别传入的读取请求与进程内请求之间的依赖关系，并且当进程内请求是读取请求时，去除依赖关系 目前尚未暂停。
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9.发明申请DEVICE AND METHOD FOR SECURE USER INTERFACE GESTURE PROCESSING USING PROCESSOR GRAPHICS 有权使用处理器图形确保用户界面姿态处理的设备和方法公开(公告)号：US20140096068A1
公开(公告)日：2014-04-03
申请号：US13631288
申请日：2012-09-28
申请人： Prashant Dewan , Siddhartha Chhabra , Xiaozhu Kang , Xiaoning Li , Uday R. Savagaonkar , David M. Durham , Paul S. Schmitz , Michael A. Goldsmith , Jason Martin
发明人： Prashant Dewan , Siddhartha Chhabra , Xiaozhu Kang , Xiaoning Li , Uday R. Savagaonkar , David M. Durham , Paul S. Schmitz , Michael A. Goldsmith , Jason Martin
IPC分类号： G06F3/0481 , G06F3/041
CPC分类号： G06F3/0481 , G06F3/041 , G06F3/04883 , G06F21/74 , G06F21/82
摘要： A device and method for securely rendering content on a gesture-enabled computing device includes initializing a secure execution environment on a processor graphics of the computing device. The computing device transfers view rendering code and associated state data to the secure execution environment. An initial view of the content is rendered by executing the view rendering code in the secure execution environment. A gesture is recognized, and an updated view of the content is rendered in the secure execution environment in response to the gesture. The gesture may include a touch gesture recognized on a touch screen, or a physical gesture of the user recognized by a camera. After the updated view of the content is rendered, the main processor of the computing device may receive updated view data from the secure execution environment.
摘要翻译： 用于在启用姿势的计算设备上安全地呈现内容的设备和方法包括在计算设备的处理器图形上初始化安全执行环境。 计算设备将视图呈现代码和相关联的状态数据传送到安全执行环境。 通过在安全执行环境中执行视图呈现代码来呈现内容的初始视图。 识别手势，并且响应于手势在安全执行环境中呈现内容的更新视图。 手势可以包括在触摸屏上识别的触摸手势，或者由相机识别的用户的身体手势。 在呈现内容的更新视图之后，计算设备的主处理器可以从安全执行环境接收更新的视图数据。
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10.发明申请Embedding and patching integrity information in a program file having relocatable file sections 审中-公开在具有可重定位文件部分的程序文件中嵌入和修补完整性信息公开(公告)号：US20080163375A1
公开(公告)日：2008-07-03
申请号：US11647896
申请日：2006-12-28
IPC分类号： H04L9/32
CPC分类号： G06F21/64
摘要： Methods and apparatuses enable embedding integrity manifest information into a program in volatile memory. Instead of having fixed integrity manifest information that cannot be changed after compilation, a file of a format supporting relocatable file sections can store the integrity manifest information for a program. The integrity manifest information can be modified in-line, while the file is loaded in volatile memory, and the information stored to disk for later re-use. The program and its associated file can include a modifiable integrity manifest indicator that provides the location and size of the integrity manifest, and can be changed as appropriate. The indicator can be passed to a service processor to indicate the integrity manifest to the service processor.
摘要翻译： 方法和装置能够将完整性清单信息嵌入到易失性存储器中的程序中。 编译后无法修改无法修改的完整性清单信息，而是支持可重定位文件段的格式的文件可以存储程序的完整性清单信息。 完整性清单信息可以在线修改，同时将文件加载到易失性存储器中，并将信息存储到磁盘以供以后重新使用。 该程序及其关联的文件可以包括可修改的完整性清单指示符，其提供完整性清单的位置和大小，并且可以适当地改变。 指示符可以被传递到服务处理器以指示服务处理器的完整性清单。
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