摘要:
A communications port is implemented for configuration in direction and arrangement. According to an example embodiment of the present invention, a communications link, such as a PCI Express type link, is configurable for communicating with devices having different directional and/or polarity configurations. The communications link is configured to match a communications port condition (e.g., a directional and/or polarity condition) of a device coupled to the communications link. In one instance, the communications link is directionally configurable for reassigning input lanes to output lanes and output lanes to input lanes. With this approach, the communications link can be used to communicate with a variety of devices having varied communication characteristics.
摘要:
A communications port is implemented for configuration in direction and arrangement. According to an example embodiment of the present invention, a communications link (110), such as a PCI Express type link, is configurable for communicating with devices having different directional and/or polarity configurations. The communications link is configured to match a communications port condition (e.g., a directional and/or polarity condition) of a device (120) coupled to the communications link. In one instance, the communications link is directionally configurable for reassigning input lanes to output lanes and output lanes to input lanes. With this approach, the communications link can be used to communicate with a variety of devices having varied communication characteristics.
摘要:
An AC electrically coupled FET device (301) is disclosed with a coupling capacitor (302) disposed for receiving a digital input signal having transitions and for AC coupling this input signal to the gate terminal of the FET device (301). A reference bias circuit (306) is provided for providing a first bias voltage (403b) that is above a threshold voltage of the FET device (301) and a second bias voltage (403a), where the first and second bias voltage (403b, 403a) are higher than rail to rail supply voltages. Switching circuitry (304, 305) is electrically coupled with the gate terminal of the FET device (301) for one of coupling of the first bias voltage (403b) and uncoupling of the second bias voltage (403a) and coupling of the second bias voltage (403a) and uncoupling of the first bias voltage (403b) in response to the transitions in the digital input signal.