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    Nonvolatile memory cell and method of manufacturing the same
    2.
    发明授权
    Nonvolatile memory cell and method of manufacturing the same 有权
    非易失性存储单元及其制造方法

    公开(公告)号：US08716035B2

    公开(公告)日：2014-05-06

    申请号：US14022705

    申请日：2013-09-10

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Sung Min Yoon ,  Chun Won Byun ,  Shin Hyuk Yang ,  Sang Hee Park ,  Soon Won Jung ,  Seung Youl Kang ,  Chi Sun Hwang ,  Byoung Gon Yu

    IPC: H01L51/00

    CPC classification number: H01L29/6684 ,  B82Y10/00 ,  G11C11/22 ,  H01L21/28291 ,  H01L27/1159 ,  H01L29/78391

    Abstract: Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.

    Abstract translation: 提供一种非易失性存储单元及其制造方法。 非易失性存储单元包括存储晶体管和驱动晶体管。 存储晶体管包括设置在基板上的半导体层，缓冲层，有机铁电层和栅极电极。 驱动晶体管包括设置在基板上的半导体层，缓冲层，栅极绝缘层和栅极电极。 存储晶体管和驱动晶体管设置在同一衬底上。 非易失性存储单元在可见光区域是透明的。

    Inverter, NAND gate, and NOR gate
    3.
    发明授权
    Inverter, NAND gate, and NOR gate 失效
    逆变器，NAND门和NOR门

    公开(公告)号：US08710866B2

    公开(公告)日：2014-04-29

    申请号：US14050313

    申请日：2013-10-09

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Sang Hee Park ,  Chi Sun Hwang ,  Sung Min Yoon ,  Him Chan Oh ,  Kee Chan Park ,  Tao Ren ,  Hong Kyun Leem ,  Min Woo Oh ,  Ji Sun Kim ,  Jae Eun Pi ,  Byeong Hoon Kim ,  Byoung Gon Yu

    IPC: H03K19/20

    CPC classification number: H03K3/012 ,  H03K19/094 ,  H03K19/20

    Abstract: Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.

    Abstract translation: 公开了一种逆变器，NAND门和NOR门。 逆变器包括：上拉单元，由根据施加到栅极的电压向输出端子输出第一电源电压的第二薄膜晶体管构成; 根据施加到门的输入信号，将由接地电压输出到输出端的第五薄膜晶体管构成的下拉单元; 以及根据输入信号将第二电源电压或接地电压施加到第二薄膜晶体管的栅极的上拉驱动器。

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