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    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
    2.
    发明公开
    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF 审中-公开

    公开(公告)号：US20240074205A1

    公开(公告)日：2024-02-29

    申请号：US17896745

    申请日：2022-08-26

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Meng-Han Lin ,  Chia-En Huang

    IPC分类号： H01L27/1159

    CPC分类号： H01L27/1159

    摘要： A semiconductor device includes a plurality of ferroelectric memory cells arranged over a substrate. Each of the plurality of ferroelectric memory cells includes: a first conductive structure extending along a first lateral direction and having a central portion and a pair of side portions, the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction; a ferroelectric layer disposed above the first conductive structure and in contact with the central portion of the first conductive structure; a channel film disposed above a portion of the ferroelectric layer; a second conductive structure disposed above and in contact with the channel film; and a third conductive structure disposed above and in contact with the channel film.

    SEMICONDUCTOR DEVICE INCLUDING OXIDE CHANNEL LAYER AND FERROELECTRIC LAYER AND METHOD OF FABRICATING THE SAME
    5.
    发明公开
    SEMICONDUCTOR DEVICE INCLUDING OXIDE CHANNEL LAYER AND FERROELECTRIC LAYER AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20240008282A1

    公开(公告)日：2024-01-04

    申请号：US18059547

    申请日：2022-11-29

    申请人： SK hynix Inc.

    发明人： Mir IM

    IPC分类号： H01L27/11597 ,  H01L27/1159 ,  H01L27/11592

    CPC分类号： H01L27/11597 ,  H01L27/1159 ,  H01L27/11592

    摘要： A semiconductor device according to an embodiment includes a substrate, a source electrode layer and a drain electrode layer that are disposed over the substrate to be spaced apart from each other in a direction substantially perpendicular to a surface of the substrate, first and second oxide channel layers the extend in the direction substantially perpendicular to the surface of the substrate between the source electrode layer and the drain electrode layer, a ferroelectric layer disposed adjacent to the first and second oxide channel layers, and a gate electrode layer disposed on the ferroelectric layer. The first and second oxide channel layers have different band gap energies from each other.

    MEMORY STRUCTURE INCLUDING THREE-DIMENSIONAL NOR MEMORY STRINGS OF JUNCTIONLESS FERROELECTRIC MEMORY TRANSISTORS AND METHOD OF FABRICATION
    6.
    发明公开
    MEMORY STRUCTURE INCLUDING THREE-DIMENSIONAL NOR MEMORY STRINGS OF JUNCTIONLESS FERROELECTRIC MEMORY TRANSISTORS AND METHOD OF FABRICATION 审中-公开

    公开(公告)号：US20230262988A1

    公开(公告)日：2023-08-17

    申请号：US17936320

    申请日：2022-09-28

    申请人： SUNRISE MEMORY CORPORATION

    发明人： Eli Harari

    IPC分类号： H01L27/11597 ,  H01L27/1159 ,  H01L27/11592

    CPC分类号： H01L27/11597 ,  H01L27/1159 ,  H01L27/11592

    摘要： A memory structure including three-dimensional NOR memory strings and method of fabrication is disclosed. In some embodiments, a memory structure includes randomly accessible ferroelectric storage transistors organized as horizontal NOR memory strings. The NOR memory strings are formed over a semiconductor substrate in multiple scalable memory stacks of thin-film storage transistors. The three-dimensional memory stacks are manufactured in a process that includes forming operational trenches for vertical local word lines and forming auxiliary trenches to facilitate back-alley metal replacement and channel separation by a backside selective etch process. In some embodiments, the ferroelectric storage transistors are junctionless field-effect transistors (FeFETs) having a ferroelectric polarization layer as the gate dielectric layer formed adjacent a semiconductor oxide layer as the channel region.

    FERROELECTRIC MEMORY DEVICE
    8.
    发明公开
    FERROELECTRIC MEMORY DEVICE 审中-公开

    公开(公告)号：US20230165012A1

    公开(公告)日：2023-05-25

    申请号：US18049366

    申请日：2022-10-25

    申请人： Samsung Electronics Co., Ltd.

    发明人： Gabjin Nam ,  Bongjin Kuh ,  Musarrat Hasan ,  Geonju Park ,  Yongho Ha

    IPC分类号： H01L27/1159

    CPC分类号： H01L27/1159

    摘要： A ferroelectric memory device according to the inventive concept includes a substrate having source/drain regions, an interface layer on the substrate, a high dielectric layer on the interface layer, a ferroelectric layer on the high dielectric layer, and a gate electrode layer on the ferroelectric layer. The high dielectric layer and the ferroelectric layer have phases of different crystal structures.