公开(公告)号：US11894098B2

公开(公告)日：2024-02-06

申请号：US17213133

申请日：2021-03-25

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074 ,  G06F12/0882 ,  G06F3/06 ,  G06F12/02 ,  G06F13/42 ,  G06F12/06 ,  G06F12/0866 ,  G11C11/406

CPC classification number: G11C7/1075 ,  G11C11/4074 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0656 ,  G06F12/0238 ,  G06F12/063 ,  G06F12/0692 ,  G06F12/0866 ,  G06F12/0882 ,  G06F13/4221 ,  G06F13/4278 ,  G11C11/40615 ,  Y02D10/00

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US20190035440A1

公开(公告)日：2019-01-31

申请号：US16151347

申请日：2018-10-04

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US12154652B2

公开(公告)日：2024-11-26

申请号：US18540888

申请日：2023-12-15

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074 ,  G06F3/06 ,  G06F12/02 ,  G06F12/06 ,  G06F12/0866 ,  G06F12/0882 ,  G06F13/42 ,  G11C11/406

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US20240112707A1

公开(公告)日：2024-04-04

申请号：US18540888

申请日：2023-12-15

Applicant: Etron Technology, Inc

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074

CPC classification number: G11C7/1075 ,  G11C11/4074 ,  G06F12/0882

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US20210217451A1

公开(公告)日：2021-07-15

申请号：US17213133

申请日：2021-03-25

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US10998017B2

公开(公告)日：2021-05-04

申请号：US16151347

申请日：2018-10-04

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10 ,  G11C11/4074 ,  G06F12/0882 ,  G06F3/06 ,  G06F12/02 ,  G06F13/42 ,  G06F12/06 ,  G06F12/0866 ,  G11C11/406

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

公开(公告)号：US20140025879A1

公开(公告)日：2014-01-23

申请号：US13922242

申请日：2013-06-19

Applicant: Etron Technology, Inc.

Inventor： Der-Min Yuan ,  Yen-An Chang ,  Wei-Ming Huang

IPC: G11C7/10

CPC classification number: G11C7/1075 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0656 ,  G06F12/0238 ,  G06F12/063 ,  G06F12/0692 ,  G06F12/0866 ,  G06F12/0882 ,  G06F13/4221 ,  G06F13/4278 ,  G11C11/40615 ,  G11C11/4074 ,  Y02D10/14 ,  Y02D10/151

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

Abstract translation: 应用于嵌入式显示端口的动态随机存取存储器包括存储器核心单元，外围电路单元和输入/输出单元。 存储器核心单元用于以第一预定电压工作。 外围电路单元电连接到存储器芯单元，用于在第二预定电压下工作，其中第二预定电压低于1.1V。 输入/输出单元电连接到存储器芯单元和外围电路单元，用于在第三预定电压下工作，其中第三预定电压低于1.1V。