公开(公告)号：US11430783B2

公开(公告)日：2022-08-30

申请号：US16745349

申请日：2020-01-17

Applicant: Faraday Technology Corp.

Inventor： Chia-Ku Tsai ,  Tsung-Hsiao Lin

IPC: H01L27/02 ,  H01L29/861 ,  H01L27/092

Abstract: The electrostatic discharge (ESD) protection apparatus includes a first well, a second well, a first doping region, and a second doping region. The first well is disposed in a substrate having a first conductivity type, wherein the first well has a second conductivity type and the substrate is electrically connected to a first pad. The second well is disposed in the first well, wherein the second well has the first conductivity type. The first doping region is disposed in the second well, wherein the first doping region has the second conductivity type, and the first doping region is electrically connected to a second pad. The second doping region is disposed in the second well, wherein the second doping region has the first conductivity type.

公开(公告)号：US20210066286A1

公开(公告)日：2021-03-04

申请号：US16745349

申请日：2020-01-17

Applicant: Faraday Technology Corp.

Inventor： Chia-Ku Tsai ,  Tsung-Hsiao Lin

IPC: H01L27/02 ,  H01L27/092 ,  H01L29/861

Abstract: The electrostatic discharge (ESD) protection apparatus includes a first well, a second well, a first doping region, and a second doping region. The first well is disposed in a substrate having a first conductivity type, wherein the first well has a second conductivity type and the substrate is electrically connected to a first pad. The second well is disposed in the first well, wherein the second well has the first conductivity type. The first doping region is disposed in the second well, wherein the first doping region has the second conductivity type, and the first doping region is electrically connected to a second pad. The second doping region is disposed in the second well, wherein the second doping region has the first conductivity type.

公开(公告)号：US20200035670A1

公开(公告)日：2020-01-30

申请号：US16153829

申请日：2018-10-08

Applicant: Faraday Technology Corp.

Inventor： Chia-Ku Tsai ,  Chi-Sheng Liao ,  Jeng-Huang Wu

IPC: H01L27/02 ,  H02H9/04

Abstract: A electrostatic discharge (ESD) protection apparatus for an integrated circuit (IC) is provided. A first electrostatic current rail and a second electrostatic current rail of the ESD protection apparatus do not directly connected to any bonding pad of the IC. The ESD protection apparatus further includes a clamp circuit and four ESD protection circuits. The clamp circuit is coupled between the first electrostatic current rail and the second electrostatic current rail. A first ESD protection circuit is coupled between the first electrostatic current rail and a signal pad of the IC. A second ESD protection circuit is coupled between the signal pad and the second electrostatic current rail. A third ESD protection circuit is coupled between a first power rail and the second electrostatic current rail. A fourth ESD protection circuit is coupled between the second electrostatic current rail and a second power rail.

公开(公告)号：US20180351351A1

公开(公告)日：2018-12-06

申请号：US15694847

申请日：2017-09-03

Applicant: Faraday Technology Corp.

Inventor： Chia-Ku Tsai

IPC: H02H9/04

Abstract: An electrostatic discharge (ESD) protection apparatus includes: an ESD circuit, arranged to perform ESD protection, wherein the ESD circuit includes a first Field Effect Transistor (FET) arranged to release ESD energy; a detection circuit, arranged to perform detection to control the ESD protection apparatus to selectively operate in one of a normal mode and a discharge mode; and a logic circuit, arranged to withstand any oscillation due to resistance-inductance-capacitance (RLC) characteristics of the detection circuit. In the detection circuit, different subsets of a plurality of resistors are respectively combined with a portion of a first serial connection circuit, an entirety of the first serial connection circuit, and a second FET to form different serial connection circuits, to configure the second FET to approach a state of being completely turned off in the normal mode.