公开(公告)号：US09537449B1

公开(公告)日：2017-01-03

申请号：US14856571

申请日：2015-09-17

Applicant: Faraday Technology Corp.

Inventor： Wei-Chieh Liao ,  Chi-Sheng Liao

IPC: H03B5/36 ,  G06F17/50

CPC classification number: H03B5/364 ,  G06F17/5036 ,  G06F17/5063

Abstract: A crystal oscillation circuit, a gain stage of the crystal oscillation circuit and a method for designing the same are provided. The gain stage includes multiple amplifiers and multiple current-limiting resistors. Input terminals of the amplifiers are coupled together to a first bonding pad, wherein transconductances of the amplifiers are different from each other. The first bonding pad is used for electrically coupling to a first terminal of an oscillation crystal module. First terminals of the current-limiting resistors are respectively coupled to output terminals of the amplifiers in a one-on-one manner, and second terminals of the current-limiting resistors are coupled together to a second bonding pad, wherein the second bonding pad is used for electrically coupling to a second terminal of the oscillation crystal module.

Abstract translation: 提供晶体振荡电路，晶体振荡电路的增益级及其设计方法。 增益级包括多个放大器和多个限流电阻。 放大器的输入端子耦合到第一接合焊盘，其中放大器的跨导彼此不同。 第一焊盘用于电耦合到振荡晶体模块的第一端子。 限流电阻器的第一端子分别以一对一的方式耦合到放大器的输出端子，并且限流电阻器的第二端子耦合到第二焊盘，其中第二焊盘是 用于电耦合到振荡晶体模块的第二端子。

公开(公告)号：US20190204368A1

公开(公告)日：2019-07-04

申请号：US15949044

申请日：2018-04-09

Applicant: Faraday Technology Corp.

Inventor： Tang-Long Chang ,  Chi-Sheng Liao ,  Jeng-Huang Wu

IPC: G01R21/133 ,  G05F3/16 ,  G06F1/26 ,  G06F13/40

CPC classification number: G01R21/133 ,  G05F3/16 ,  G06F1/266 ,  G06F13/4004

Abstract: A core power detection circuit and an associated input/output (I/O) control system are provided, where the core power detection circuit is utilized for performing power detection in the I/O control system to generate a core power detection signal to control the I/O control system, and the I/O control system operates according to a plurality of supply voltages with respect to a first reference voltage. The core power detection circuit includes: a reference power bias circuit arranged for generating a second reference voltage according to a first supply voltage of the plurality of supply voltages; and a comparison circuit, coupled to the reference power bias circuit, arranged for performing a comparison operation according to the second reference voltage and a second supply voltage of the plurality of supply voltages, to generate a third reference voltage.

公开(公告)号：US20200035670A1

公开(公告)日：2020-01-30

申请号：US16153829

申请日：2018-10-08

Applicant: Faraday Technology Corp.

Inventor： Chia-Ku Tsai ,  Chi-Sheng Liao ,  Jeng-Huang Wu

IPC: H01L27/02 ,  H02H9/04

Abstract: A electrostatic discharge (ESD) protection apparatus for an integrated circuit (IC) is provided. A first electrostatic current rail and a second electrostatic current rail of the ESD protection apparatus do not directly connected to any bonding pad of the IC. The ESD protection apparatus further includes a clamp circuit and four ESD protection circuits. The clamp circuit is coupled between the first electrostatic current rail and the second electrostatic current rail. A first ESD protection circuit is coupled between the first electrostatic current rail and a signal pad of the IC. A second ESD protection circuit is coupled between the signal pad and the second electrostatic current rail. A third ESD protection circuit is coupled between a first power rail and the second electrostatic current rail. A fourth ESD protection circuit is coupled between the second electrostatic current rail and a second power rail.

公开(公告)号：US09673808B1

公开(公告)日：2017-06-06

申请号：US15065879

申请日：2016-03-10

Applicant: Faraday Technology Corp.

Inventor： Kai-Neng Tang ,  Chi-Sheng Liao

IPC: H03K5/22 ,  H03K17/22

CPC classification number: H03K17/223

Abstract: A power-on-reset circuit including a first diode-connected transistor, a second diode-connected transistor, a resistor and a current comparator circuit is provided. A cathode of the first diode-connected transistor is coupled to a reference voltage. A first end of the resistor is coupled to a power voltage. A second end of the resistor is coupled to an anode of the first diode-connected transistor. A cathode of the second diode-connected transistor is coupled to the reference voltage. An anode of the second diode-connected transistor is coupled to the first end of the resistor. The current comparator circuit is coupled to the first diode-connected transistor and the second diode-connected transistor. The current comparator circuit compares a current of the first diode-connected transistor with a current of the second diode-connected transistor to obtain a comparing result, wherein the comparing result determines a reset signal.