公开(公告)号：US09384792B2

公开(公告)日：2016-07-05

申请号：US14580589

申请日：2014-12-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anthony R. Bonaccio ,  John K. DeBrosse ,  Thomas M. Maffitt

IPC: G11C7/02 ,  G11C7/06 ,  G11C11/16 ,  G11C29/02

CPC classification number: G11C7/065 ,  G11C7/062 ,  G11C11/1673 ,  G11C29/026 ,  G11C29/028

Abstract: Embodiments are directed to a self-reference STT-MRAM sensing scheme that uses offset-cancellation to reduce the impact of FET mismatch and thereby allow the sensing of lower read voltages. In some embodiments, the sensing scheme includes a differential amplifier having a first input connected to a memory cell. In some embodiments, a second input of the differential amplifier may be connected to ground, a common mode voltage of the system or a mid-level supply voltage. The present disclosure provides flexibility with respect to the voltage level at which the sensing is performed (e.g., ground, Voc, Vmid, etc.). The present disclosure provides further flexibility with respect to the sense voltage polarity.

Abstract translation: 实施例涉及使用偏移消除以减少FET失配的影响并因此允许感测较低读取电压的自参考STT-MRAM感测方案。 在一些实施例中，感测方案包括具有连接到存储器单元的第一输入的差分放大器。 在一些实施例中，差分放大器的第二输入可以连接到地，系统的共模电压或中间电源电压。 本公开提供了关于执行感测的电压电平（例如，地面，Voc，Vmid等）的灵活性。 本公开提供了关于感测电压极性的进一步的灵活性。