公开(公告)号：US20160005867A1

公开(公告)日：2016-01-07

申请号：US14795716

申请日：2015-07-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vimal K. KAMINENI ,  Ruilong XIE ,  Robert MILLER

IPC: H01L29/78 ,  H01L29/45 ,  H01L23/535 ,  H01L29/49

CPC classification number: H01L29/7851 ,  H01L21/28518 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/535 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/495 ,  H01L29/66795 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor transistor has a structure including a semiconductor substrate, a source region, a drain region and a channel region in between the source region and the drain region. A metal gate, having a top conductive portion of tungsten is provided above the channel region. A first silicon nitride protective layer over the source region and the drain region and a second silicon nitride protective layer over the gate region are provided. The first silicon nitride protective layer and the second silicon nitride protective layer are configured to allow punch-through of the first silicon nitride protective layer while preventing etching through the second silicon nitride protective layer. Source and drain silicide is protected by avoiding fully etching a gate opening unless either the etching used would not harm the silicide, or the silicide and source and drain contacts are created prior to fully etching an opening to the gate for a gate contact.