公开(公告)号：US20140273396A1

公开(公告)日：2014-09-18

申请号：US13827786

申请日：2013-03-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Maik Liebau ,  Ronny Pfuetzner

IPC: H01L49/02

CPC classification number: H01L28/40

Abstract: A method comprises forming a first layer of an electrically insulating material over a semiconductor structure. A recess is formed in the first layer of electrically insulating material. A capacitor layer stack is deposited over the first layer of electrically insulating material. The capacitor layer stack includes one or more bottom electrode layers, a dielectric layer and a top electrode layer, wherein a first portion of the capacitor layer stack is arranged in the recess and a second portion of the capacitor layer stack is arranged over a portion of the first layer of electrically insulating material adjacent the recess. A chemical mechanical polishing process is performed. The chemical mechanical polishing process removes the second portion of the capacitor layer stack, wherein the first portion of the capacitor layer stack is not removed.

Abstract translation: 一种方法包括在半导体结构上形成电绝缘材料的第一层。 在第一层电绝缘材料中形成凹部。 在电绝缘材料的第一层上沉积电容器层堆叠。 电容器层堆叠包括一个或多个底部电极层，电介质层和顶部电极层，其中电容器层堆叠的第一部分布置在凹部中，并且电容器层堆叠的第二部分布置在 邻近凹槽的第一层电绝缘材料。 进行化学机械抛光工艺。 化学机械抛光工艺去除电容器层堆叠的第二部分，其中电容器层堆叠的第一部分不被去除。

公开(公告)号：US08969170B2

公开(公告)日：2015-03-03

申请号：US13827786

申请日：2013-03-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Maik Liebau ,  Ronny Pfuetzner

IPC: H01L21/20 ,  H01L49/02

CPC classification number: H01L28/40

Abstract: A method comprises forming a first layer of an electrically insulating material over a semiconductor structure. A recess is formed in the first layer of electrically insulating material. A capacitor layer stack is deposited over the first layer of electrically insulating material. The capacitor layer stack includes one or more bottom electrode layers, a dielectric layer and a top electrode layer, wherein a first portion of the capacitor layer stack is arranged in the recess and a second portion of the capacitor layer stack is arranged over a portion of the first layer of electrically insulating material adjacent the recess. A chemical mechanical polishing process is performed. The chemical mechanical polishing process removes the second portion of the capacitor layer stack, wherein the first portion of the capacitor layer stack is not removed.

Abstract translation: 一种方法包括在半导体结构上形成电绝缘材料的第一层。 在第一层电绝缘材料中形成凹部。 在电绝缘材料的第一层上沉积电容器层堆叠。 电容器层堆叠包括一个或多个底部电极层，电介质层和顶部电极层，其中电容器层堆叠的第一部分布置在凹部中，并且电容器层堆叠的第二部分布置在 邻近凹槽的第一层电绝缘材料。 进行化学机械抛光工艺。 化学机械抛光工艺去除电容器层堆叠的第二部分，其中电容器层堆叠的第一部分不被去除。

公开(公告)号：US20140264877A1

公开(公告)日：2014-09-18

申请号：US14287993

申请日：2014-05-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ronny Pfuetzner ,  Jens Heinrich

IPC: H01L23/532 ,  H01L23/538

CPC classification number: H01L23/53228 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L23/53238 ,  H01L23/53295 ,  H01L23/5384 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first metallization layer positioned above a substrate of the semiconductor device, the metallization layer including a dielectric material and a copper-containing metal region embedded in the dielectric material. The semiconductor device also includes a conductive barrier layer positioned along substantially an entirety of an interface between the copper-containing metal region and the dielectric material, the conductive barrier layer including a copper/silicon compound that is in direct contact with the dielectric material along substantially the entirety of the interface.

Abstract translation: 半导体器件包括位于半导体器件的衬底上方的第一金属化层，金属化层包括介电材料和嵌入电介质材料中的含铜金属区域。 所述半导体器件还包括沿着所述含铜金属区域和所述电介质材料之间的界面的大致整体定位的导电阻挡层，所述导电阻挡层包括铜/硅化合物，所述铜/硅化合物基本上与所述电介质材料直接接触 整个界面。