公开(公告)号：US09466661B2

公开(公告)日：2016-10-11

申请号：US14511746

申请日：2014-10-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dina Triyoso ,  Shao-Fu Sanford Chu ,  Bo Yu

IPC: H01L49/02 ,  H01L27/08

CPC classification number: H01L28/60 ,  H01L27/0805

Abstract: Methods for fabricating MIM capacitors with low VCC or decoupling and analog/RF capacitors on a single chip and the resulting devices are provided. Embodiments include forming: first and second metal lines in a substrate; a first electrode over, but insulated from, the first metal line; a first high-k dielectric layer on the first electrode, the first high-k dielectric layer having a coefficient α; a second electrode on the first high-k dielectric layer and over a portion of the first electrode; a second high-k dielectric layer on the second electrode, the second high-k dielectric layer having a coefficient α′ opposite in polarity but substantially equal in magnitude to α; a third electrode on the second high-k dielectric layer over the entire first electrode; and a metal-filled via through a dielectric layer down to the first metal line, and a metal-filled via through the dielectric layer down to the second metal line.

Abstract translation: 提供了在单个芯片上制造具有低VCC或去耦的MIM电容器和模拟/ RF电容器的方法以及所得到的器件。 实施例包括在衬底中形成第一和第二金属线; 第一电极，但与第一金属线绝缘; 在第一电极上的第一高k电介质层，第一高k电介质层具有系数α; 在第一高k电介质层上并在第一电极的一部分上的第二电极; 在第二电极上的第二高k电介质层，第二高k电介质层具有极性相反的系数α'，而与α大致相等; 在整个第一电极上的第二高k电介质层上的第三电极; 以及通过电介质层向下延伸到第一金属线的金属填充的通孔，以及通过介电层的金属填充的通孔，直到第二金属线。