公开(公告)号：US20170061044A1

公开(公告)日：2017-03-02

申请号：US14841037

申请日：2015-08-31

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Guo Xiang NING ,  Yuping REN ,  David POWER ,  Lalit SHOKEEN ,  Chin Teong LIM ,  Paul W. ACKMANN ,  Xiang HU

IPC: G06F17/50 ,  G03F1/36 ,  G05B15/02

CPC classification number: G06F17/5009 ,  G03F1/36 ,  G06F17/5081

Abstract: A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include performing an overlap pattern classification on a wafer; calibrating a dielectric etch bias or a hard mask etch bias based on the pattern classification; comparing either a CD overlap of a via layer with a metal layer and a CD overlap of the via layer with a lower connecting metal layer or a CD overlap of the metal layer with an upper connecting via layer and a CD overlap of the metal layer with the via layer against a criteria; outputting final dielectric etch compensation and hard mask etch compensation tables to either OPC or MPC process flows; and repeating the steps of calibrating, comparing, and outputting for either the via layer or metal layer remaining.

Abstract translation: 提供了用于产生用于OPC或MPC工艺流程的最终电介质蚀刻补偿表和最终硬掩模蚀刻补偿表的方法和装置。 实施例包括在晶片上执行重叠图案分类; 基于图案分类来校准电介质蚀刻偏压或硬掩模蚀刻偏压; 将通孔层与金属层的CD重叠与通孔层的CD重叠与金属层的下连接金属层或CD重叠与上连接通孔层和金属层的CD重叠与 通过层反对标准; 将最终介电蚀刻补偿和硬掩模蚀刻补偿表输出到OPC或MPC工艺流程; 并重复校准，比较和输出剩余的通孔层或金属层的步骤。