公开(公告)号：US09240324B2

公开(公告)日：2016-01-19

申请号：US14328921

申请日：2014-07-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Matthew J. BrightSky ,  Chung H. Lam ,  Gen P. Lauer

IPC: H01L21/28 ,  H01L27/24 ,  H01L45/00

CPC classification number: H01L21/28008 ,  H01L27/2454 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144

Abstract: A method to prevent a gate contact from electrically connecting to a source contact for a plurality of memory cells on a substrate. The method includes depositing and etching gate material to partially fill a space between the pillars and to form a word line for the memory cells, etching a gate contact region for the word line between the pair of pillars, forming a spacer of electrically insulating material in the gate contact region, and depositing a gate contact between the pair of pillars to be in electrical contact with the gate material such that the spacer surrounds the gate contact.

Abstract translation: 一种防止栅极接触与衬底上的多个存储器单元的源极接触电连接的方法。 该方法包括沉积和蚀刻栅极材料以部分地填充柱之间的空间并形成用于存储单元的字线，蚀刻一对柱之间的字线的栅极接触区域，形成电绝缘材料的间隔物 所述栅极接触区域以及在所述一对柱之间沉积栅极接触以与所述栅极材料电接触，使得所述间隔物围绕所述栅极接触。