公开(公告)号：US09123808B2

公开(公告)日：2015-09-01

申请号：US14076562

申请日：2013-11-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Robert Lutz

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/762

CPC classification number: H01L29/7848 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/0692 ,  H01L29/66568 ,  H01L29/66636 ,  H01L29/7846

Abstract: When forming field effect transistors with a semiconductor alloy layer, e.g., SiGe, embedded in the source/drain regions, a strategy called tucking has been developed in order to improve formation of the semiconductor alloy layer. An improved tucking strategy is hereby proposed, wherein the interface between the isolation region and the active region is not straight, but it rather defines an indentation, so that the active region protrudes into the isolation region in correspondence to the indentation. A gate is then formed on the surface of the device in such a way that a portion of the indentation is covered by the gate. An etching process is then performed, during which the gate acts as a screen. The etching thus gives rise to a cavity defined by a sidewall comprising portions exposing silicon, alternated to portions exposing the dielectric material of the isolation region.

Abstract translation: 当用半导体合金层（例如嵌入在源/漏区中的SiGe）形成场效应晶体管时，已经开发了一种称为折叠的策略，以便改善半导体合金层的形成。 因此，提出了一种改进的折叠策略，其中隔离区域和有源区域之间的界面不是直的，而是限定了凹陷，使得有源区域对应于凹陷突出到隔离区域中。 然后在装置的表面上形成栅极，使得凹陷的一部分被栅极覆盖。 然后执行蚀刻处理，在该过程期间，栅极用作屏幕。 因此蚀刻产生由侧壁限定的空腔，该侧壁包括暴露硅的部分，交替地暴露隔离区的电介质材料的部分。

公开(公告)号：US09076688B1

公开(公告)日：2015-07-07

申请号：US14202675

申请日：2014-03-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Robert Lutz ,  Robert Melzer

IPC: H01L21/66

CPC classification number: H01L22/12 ,  G01B2210/56 ,  H01L22/30

Abstract: Methodologies and an apparatus for enabling scatterometry to be used to estimate dimensions of fabricated semiconductor devices are provided. Embodiments include initiating scatterometry on a fabricated test structure comprising a two-dimensional array of features, each of the features being horizontally separated from an adjacent one of the features by a narrow trench region extending a first distance in a horizontal direction and each of the features being vertically separated from an adjacent one of the features by an isolated trench region extending a second distance in a vertical direction. A scattering spectra corresponding to one or more physical characteristics of the fabricated test structure based on results of the scatterometry is determined. The scattering spectra is associated with the one or more physical characteristics in a library for estimating at least one physical dimension of a fabricated structure.

Abstract translation: 提供了用于使散射仪用于估计制造的半导体器件的尺寸的方法和装置。 实施例包括在包括特征的二维阵列的制造的测试结构上启动散射测量，每个特征通过在水平方向上延伸第一距离的窄沟槽区域与相邻特征之间水平分离，并且每个特征 通过在垂直方向上延伸第二距离的隔离沟槽区域与相邻的一个特征垂直分离。 确定对应于基于散射测量结果的制造的测试结构的一个或多个物理特性的散射光谱。 散射光谱与文库中用于估计制造结构的至少一个物理尺寸的一个或多个物理特性相关联。