公开(公告)号：US09318415B2

公开(公告)日：2016-04-19

申请号：US14148532

申请日：2014-01-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Stephen M Gates ,  Daniel C. Edelstein ,  Satyanarayana V. Nitta

IPC: H01L23/48 ,  H01L27/06 ,  H01L25/18 ,  H01L21/02 ,  H01L23/00 ,  H01L25/00 ,  H01L29/66 ,  H01L29/861 ,  H01L29/872 ,  H01L23/522 ,  H01L23/532 ,  H01L27/01

CPC classification number: H01L23/481 ,  H01L21/02667 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/53238 ,  H01L24/80 ,  H01L25/18 ,  H01L25/50 ,  H01L27/016 ,  H01L27/0688 ,  H01L29/66984 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/00

Abstract: An integrated circuit and method includes a substrate, a plurality of semiconductor device layers monolithically integrated on the substrate, and a metal wiring layer with vias interconnecting the plurality of semiconductor device layers. The semiconductor device layers are devoid of bonding or joining interface with the substrate.

Abstract translation: 集成电路和方法包括：衬底，单片集成在衬底上的多个半导体器件层，以及具有互连多个半导体器件层的通孔的金属布线层。 半导体器件层没有与衬底接合或结合界面。