公开(公告)号：US20160225679A1

公开(公告)日：2016-08-04

申请号：US14611496

申请日：2015-02-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sukeshwar KANNAN ,  Xiaoqiang ZHANG ,  Shan GAO

IPC: H01L21/66 ,  H01L21/768

CPC classification number: H01L22/14 ,  H01L22/34 ,  H01L23/481 ,  H01L23/5256 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: Methods of testing TSVs using eFuse cells prior to and post bonding wafers in a 3D IC stack are provided. Embodiments include providing a wafer of a 3D IC stack, the wafer having thin and thick metal layers; forming first and second TSVs on the wafer, the first and second TSVs laterally separated; forming an eFuse cell between and separated from the first and second TSVs; forming a FF adjacent to the second TSV and on an opposite side of the second TSV from the eFuse cell; connecting the first TSV, the eFuse cell, the second TSV, and the FF in series in an electric circuit; and testing the first and second TSVs prior to bonding the wafer to a subsequent wafer in the 3D IC stack.

Abstract translation: 提供了在3D IC堆叠中将晶片接合和贴合之后使用eFuse电池测试TSV的方法。 实施例包括提供3D IC堆叠的晶片，该晶片具有薄而厚的金属层; 在晶片上形成第一和第二TSV，第一和第二TSV横向分离; 在第一和第二TSV之间形成eFuse单元并在其间分离; 在第二TSV附近形成与第二TSV相对的FF与eFuse单元; 在电路中串联连接第一TSV，eFuse单元，第二TSV和FF; 以及在将晶片连接到3D IC堆叠中的后续晶片之前测试第一和第二TSV。