METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE BY STOPPING PLANARIZATION OF INSULATING MATERIAL ON FINS
    1.
    发明申请
    METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE BY STOPPING PLANARIZATION OF INSULATING MATERIAL ON FINS 审中-公开
    通过停止绝缘材料在FINS上的平面化制造半导体器件的方法

    公开(公告)号:US20150093877A1

    公开(公告)日:2015-04-02

    申请号:US14042997

    申请日:2013-10-01

    CPC classification number: H01L21/76224 H01L21/31053 H01L21/31055

    Abstract: A method for fabricating a semiconductor device is provided, including forming a mask on a surface of a semiconductor substrate, creating isolation trenches within the substrate, and removing the mask from the substrate before depositing an insulating material within the trenches. The insulating material is then planarized to form a surface that is substantially coplanar with the surface of the semiconductor substrate.

    Abstract translation: 提供了一种制造半导体器件的方法,包括在半导体衬底的表面上形成掩模,在衬底内形成隔离沟槽,以及在沟槽内淀积绝缘材料之前从衬底去除掩模。 然后将绝缘材料平坦化以形成与半导体衬底的表面基本上共面的表面。

    FINFET GATE WITH INSULATED VIAS AND METHOD OF MAKING SAME
    2.
    发明申请
    FINFET GATE WITH INSULATED VIAS AND METHOD OF MAKING SAME 有权
    具有绝缘VIAS的FINFET闸门及其制造方法

    公开(公告)号:US20140367803A1

    公开(公告)日:2014-12-18

    申请号:US13917019

    申请日:2013-06-13

    Abstract: An intermediate semiconductor structure of a FinFET device in fabrication includes a substrate, a plurality of fin structures coupled to the substrate and a dummy gate disposed perpendicularly over the fin structures. A portion of the dummy gate is removed between the fin structures to create one or more vias and the one or more vias are filled with a dielectric. The dummy gate is then replaced with a metal gate formed around the dielectric-filled vias.

    Abstract translation: 在制造中的FinFET器件的中间半导体结构包括衬底,耦合到衬底的多个翅片结构和垂直于翅片结构设置的虚拟栅极。 在翅片结构之间去除虚拟栅极的一部分以产生一个或多个通孔,并且一个或多个通孔用电介质填充。 然后用在电介质填充的通孔周围形成的金属栅极替换虚拟栅极。

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