公开(公告)号：US20220028873A1

公开(公告)日：2022-01-27

申请号：US16935691

申请日：2020-07-22

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Oscar D. Restrepo ,  Edmund K. Banghart ,  William Taylor

IPC: H01L27/112 ,  H01L29/78 ,  H01L29/66

Abstract: Structures for an array of non-volatile memory cells and methods of forming a structure for an array of non-volatile memory cells. An active region of a substrate includes a first section having a side edge and a second section extending laterally from the side edge. The first section of the active region has a first length dimension in a direction parallel to the first side edge. The second section has a second length dimension in the direction parallel to the first side edge. The second length dimension is less than the first length dimension. A fin is positioned on the substrate in the second section of the active region. A gate structure extends over the fin and the second section of the active region.

公开(公告)号：US11538815B2

公开(公告)日：2022-12-27

申请号：US16935691

申请日：2020-07-22

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Oscar D. Restrepo ,  Edmund K. Banghart ,  William Taylor

IPC: H01L27/112 ,  H01L29/66 ,  H01L29/78 ,  H01L27/02 ,  H01L27/105 ,  H01L29/06

Abstract: Structures for an array of non-volatile memory cells and methods of forming a structure for an array of non-volatile memory cells. An active region of a substrate includes a first section having a side edge and a second section extending laterally from the side edge. The first section of the active region has a first length dimension in a direction parallel to the first side edge. The second section has a second length dimension in the direction parallel to the first side edge. The second length dimension is less than the first length dimension. A fin is positioned on the substrate in the second section of the active region. A gate structure extends over the fin and the second section of the active region.

公开(公告)号：US20210226044A1

公开(公告)日：2021-07-22

申请号：US16745833

申请日：2020-01-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Edmund K. Banghart ,  Alexander Martin ,  Ryan Sporer ,  Jagar Singh ,  Katherina Babich ,  George R. Mulfinger

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A first portion of a first semiconductor layer defines an emitter, a first portion of a second semiconductor layer defines a collector, and a base includes respective second portions of the first and second semiconductor layers that are laterally positioned between the first portion of the first semiconductor layer and the first portion of the second semiconductor layer. The first portion of the first semiconductor layer has a first thickness, and the first portion of the second semiconductor layer has a second thickness that is greater than the first thickness. The first portion and the second portion of the first semiconductor layer adjoin at a first junction having the first thickness. The first portion and the second portion of the second semiconductor layer adjoin at a second junction having the second thickness.

公开(公告)号：US11094805B2

公开(公告)日：2021-08-17

申请号：US16745833

申请日：2020-01-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Edmund K. Banghart ,  Alexander Martin ,  Ryan Sporer ,  Jagar Singh ,  Katherina Babich ,  George R. Mulfinger

IPC: H01L29/737 ,  H01L29/08 ,  H01L21/324 ,  H01L29/165 ,  H01L29/66 ,  H01L21/02 ,  H01L29/10

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A first portion of a first semiconductor layer defines an emitter, a first portion of a second semiconductor layer defines a collector, and a base includes respective second portions of the first and second semiconductor layers that are laterally positioned between the first portion of the first semiconductor layer and the first portion of the second semiconductor layer. The first portion of the first semiconductor layer has a first thickness, and the first portion of the second semiconductor layer has a second thickness that is greater than the first thickness. The first portion and the second portion of the first semiconductor layer adjoin at a first junction having the first thickness. The first portion and the second portion of the second semiconductor layer adjoin at a second junction having the second thickness.