Capacitor designs for integrated circuits utilizing self-aligned double patterning (SADP)
    1.
    发明授权
    Capacitor designs for integrated circuits utilizing self-aligned double patterning (SADP) 有权
    利用自对准双图案(SADP)的集成电路的电容设计

    公开(公告)号:US08856715B1

    公开(公告)日:2014-10-07

    申请号:US13948249

    申请日:2013-07-23

    CPC classification number: G06F17/5077

    Abstract: Methodologies enabling BEoL VNCAPs in ICs and resulting devices are disclosed. Embodiments include: providing a plurality of mandrel recesses extending horizontally on a substrate, each of the mandrel recesses having an identical width and being separated from another one of the mandrel recesses by an identical distance; providing a plurality of routes, each of the plurality of routes being positioned in a different one of the mandrel recesses; and providing first and second vertical segments on the substrate, the first vertical segment being connected to a set of the plurality of routes and separated from the second vertical segment, and the second vertical segment being separated from the set of routes.

    Abstract translation: 公开了在IC和结果设备中使用BEoL VNCAP的方法。 实施例包括:提供在基板上水平延伸的多个心轴凹槽,每个心轴凹槽具有相同的宽度,并且与另一个心轴凹槽分开相同的距离; 提供多条路线,所述多条路线中的每条路线被定位在不同的心轴凹槽中; 以及在所述基板上提供第一和第二垂直段,所述第一垂直段连接到所述多条路线的一组,并与所述第二垂直段分离,并且所述第二垂直段与所述路线组分离。

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