公开(公告)号：US20140157008A1

公开(公告)日：2014-06-05

申请号：US13705609

申请日：2012-12-05

Applicant: Google Inc.

Inventor： Udaya Kiran Ammu ,  Tracy Van Dyk ,  Cornelius O'Sullivan ,  Srikanth Lakshmikanthan

IPC: G06F1/30

CPC classification number: G06F1/30 ,  G06F1/26 ,  G06F1/32 ,  H02J7/0016 ,  H02J9/061 ,  H02J9/062 ,  H05K7/1492 ,  Y02B10/72

Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.

Abstract translation: 计算设备与用于共享和分发备用电力的电路相关联。 在正常操作条件下，主母线通过相应电路的主电源总线为机架中的每个计算设备供电。 在交流电停电的情况下，主电源总线被停用，电路的备用电源路径被激活。 通过备用电源路径从电路的电池向设备提供备用电源。 在电路中也激活共享电源路径，使得备用电源可以从电池提供到主母线。 通过为主母线提供备用电源，机架中没有足够备用电源的其他计算设备可能会从主母线接收备用电源，直到电源恢复。

公开(公告)号：US20180018008A1

公开(公告)日：2018-01-18

申请号：US15718546

申请日：2017-09-28

Applicant: Google Inc.

Inventor： Udaya Kiran Ammu ,  Tracy Jane Van Dyk ,  Cornelius O'Sullivan ,  Srikanth Lakshmikanthan

IPC: G06F1/30 ,  H02J9/06 ,  H05K7/14 ,  G06F1/32 ,  G06F1/26 ,  H02J7/00

CPC classification number: G06F1/30 ,  G06F1/26 ,  G06F1/32 ,  H02J7/0016 ,  H02J9/061 ,  H02J9/062 ,  H05K7/1492 ,  Y02B10/72

Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.

公开(公告)号：US09804654B2

公开(公告)日：2017-10-31

申请号：US13705609

申请日：2012-12-05

Applicant: Google Inc.

Inventor： Udaya Kiran Ammu ,  Tracy Van Dyk ,  Cornelius O'Sullivan ,  Srikanth Lakshmikanthan

IPC: G06F1/30 ,  H05K7/14 ,  H02J9/06 ,  G06F1/32 ,  H02J7/00 ,  G06F1/26

CPC classification number: G06F1/30 ,  G06F1/26 ,  G06F1/32 ,  H02J7/0016 ,  H02J9/061 ,  H02J9/062 ,  H05K7/1492 ,  Y02B10/72

Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.

公开(公告)号：US09151817B1

公开(公告)日：2015-10-06

申请号：US13869419

申请日：2013-04-24

Applicant: Google Inc.

Inventor： Srikanth Lakshmikanthan ,  Eduardo M. Lipiansky ,  Udaya Kiran Ammu

IPC: H03M1/10 ,  G01R35/00

CPC classification number: G01R35/005 ,  G01R19/0092 ,  G01R35/007

Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.

Abstract translation: 本发明涉及电流感测应用中的校准。 诸如在计算机体系结构中使用的电力转换系统可以采用降压转换器，例如降压转换器或其他类型的转换器。 本发明提供校准过程和装置以解决在这种系统中发现的各种寄生电阻。 校准电路可以耦合到降压转换器或其他功率转换，以确定用于功率转换器的输出的校准电压信号。 可以确定并编程有效的直流电阻以供所使用的控制装置使用。 以这种方式，考虑寄生电阻以获得实际电流的准确估计。 反过来，这使得电源转换器和其他设备能够在规范要求范围内运行。