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公开(公告)号：US20240039995A1
公开(公告)日：2024-02-01
申请号：US18485942
申请日：2023-10-12
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Can CHEN , Fanlu JIANG , Qiming XU , Zhaojiao HAN , Bowei YU , Jianye YAO
IPC: H04L67/1097 , G06F13/28
CPC classification number: H04L67/1097 , G06F13/28 , G06F2213/28
Abstract: A client device sends a first packet to a first storage device, to request that target data can be written into the first storage device, where the first packet includes a logical address into which the target data needs to be written. A front-end network adapter of the first storage device has a capability of parsing the first packet, and can process the first packet; writes the target data into the first storage device based on an indication of the first packet; and generates metadata, and records a correspondence between the logical address of the target data and the metadata, where the metadata can indicate a physical address at which the target data is stored in the first storage device.
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Patent Agency Ranking
公开(公告)号：US20240152476A1
公开(公告)日：2024-05-09
申请号：US18417741
申请日：2024-01-19
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Can CHEN , Ming CHEN , Chunyi TAN , Bowei YU
IPC: G06F13/40 , G06F15/173
CPC classification number: G06F13/4081 , G06F15/17331
Abstract: Example methods and apparatus for data access are described. In one example, a memory expansion card receives a first data access request generated by a computing device based on an internal bus protocol. Then, the memory expansion card performs protocol conversion on the first data access request to obtain a second data access request in an external bus protocol format, where the external bus protocol includes a bus protocol for accessing external memory space of the computing device. Further, the memory expansion card accesses the external memory space based on the second data access request. The memory expansion card shields a difference between the bus protocols, and provides internal memory space for the computing device.
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公开(公告)号：US20230136006A1
公开(公告)日：2023-05-04
申请号：US18147852
申请日：2022-12-29
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
IPC: H04L49/00
Abstract: A chip module has a plurality of first ports, at least some or all of the first ports are first selection ports, and each first selection port may act as a write port or a read port. The chip module further includes a first control module. The first control module controls, based on a transmit/receive requirement of the chip module, the first selection port to be switched to a read port or a write port, to match the transmit/receive requirement of the chip module. The first selection port may selectively act as a read port or a write port, so that switching can be performed based on an operating state of the chip module, increasing a read/write bandwidth. The first control module controls an operating state of the first selection port, to flexibly adjust a quantity of read ports and a quantity of write ports of the chip module.
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公开(公告)号：US20240323148A1
公开(公告)日：2024-09-26
申请号：US18733318
申请日：2024-06-04
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
IPC: H04L49/00
CPC classification number: H04L49/3036
Abstract: A chip module has a plurality of first ports, at least some or all of the first ports are first selection ports, and each first selection port may act as a write port or a read port. The chip module further includes a first control module. The first control module controls, based on a transmit/receive requirement of the chip module, the first selection port to be switched to a read port or a write port, to match the transmit/receive requirement of the chip module. The first selection port may selectively act as a read port or a write port, so that switching can be performed based on an operating state of the chip module, increasing a read/write bandwidth. The first control module controls an operating state of the first selection port, to flexibly adjust a quantity of read ports and a quantity of write ports of the chip module.
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公开(公告)号：US20210287720A1
公开(公告)日：2021-09-16
申请号：US17331964
申请日：2021-05-27
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Na WANG , Can CHEN , Yinzhong TANG
Abstract: An electronic device with parallel backplanes and a storage device with parallel backplanes. The electronic device includes a front inserting assembly, a rear inserting assembly, and a backplane assembly. The backplane assembly is connected to the front inserting assembly and the rear inserting assembly. The backplane assembly includes a plurality of backplanes arranged in parallel at intervals, the front inserting assembly includes a plurality of first units whose arrangement direction is the same as an arrangement direction of the backplanes, and the rear inserting assembly includes a plurality of second units whose arrangement direction intersects the arrangement direction of the backplanes. The backplane assembly is provided with the structure including the plurality of backplanes arranged in parallel at intervals and the channel between adjacent backplanes. In addition, the first units and the second units are connected to two opposite sides of the backplanes, respectively.
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公开(公告)号：US20220253356A1
公开(公告)日：2022-08-11
申请号：US17731566
申请日：2022-04-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Can CHEN , Hongdong ZHANG
IPC: G06F11/10
Abstract: A redundant data calculation method and apparatus. The method is applied to the redundant data calculation apparatus including a processor and a redundant data calculation unit. In the method, after obtaining to-be-processed data, the processor stores the to-be-processed data in cache space of the redundant data calculation unit. The redundant data calculation unit obtains the to-be-processed data from the cache space and performs calculation for checking the to-be-processed data to obtain redundant data corresponding to the to-be-processed data.
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