公开(公告)号：US20200183591A1

公开(公告)日：2020-06-11

申请号：US16789141

申请日：2020-02-12

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian HE ,  Xiaoke NI ,  Yimin YAO

IPC: G06F3/06 ,  G06F13/38 ,  G06F13/40 ,  G06F13/42

Abstract: A packet forwarding method, device, and system for use in non-volatile memory express (NVMe) over fabric. According to the method, a first packet sent by a control device is received; a second packet is generated according to the first packet; a network port for forwarding the second packet is selected according to an identity of a target non-volatile memory; and the second packet is encapsulated into a packet that meets an NVMe over fabric forwarding requirement, and the encapsulated second packet is sent by using the selected network port.

公开(公告)号：US20230136006A1

公开(公告)日：2023-05-04

申请号：US18147852

申请日：2022-12-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yongyao LI ,  Jiang ZHU ,  Lv CHEN ,  Yimin YAO ,  Wei LI ,  Can CHEN

IPC: H04L49/00

Abstract: A chip module has a plurality of first ports, at least some or all of the first ports are first selection ports, and each first selection port may act as a write port or a read port. The chip module further includes a first control module. The first control module controls, based on a transmit/receive requirement of the chip module, the first selection port to be switched to a read port or a write port, to match the transmit/receive requirement of the chip module. The first selection port may selectively act as a read port or a write port, so that switching can be performed based on an operating state of the chip module, increasing a read/write bandwidth. The first control module controls an operating state of the first selection port, to flexibly adjust a quantity of read ports and a quantity of write ports of the chip module.

公开(公告)号：US20140122768A1

公开(公告)日：2014-05-01

申请号：US14143996

申请日：2013-12-30

Applicant: Huawei Technologies Co., Ltd.

Inventor： Dexian SU ,  Yimin YAO ,  Jing WANG

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F13/4027 ,  G06F13/4282 ,  G06F2213/0026 ,  H04L49/35

Abstract: Embodiments of the present invention disclose a peripheral component interconnect express interface control unit. The unit includes a P2P module, configured to receive a first TLP from a RC or an EP and forward the first TLP to a reliable TLP transmission RTT module for processing; the reliable TLP transmission module, configured to determine, according to the received first TLP, sending links connected to active and standby PCIE switching units, and send the first TLP to the active and standby PCIE switching units through the sending links at the same time, so that a destination PCIE interface controller of the first TLP selectively receives the first TLP forwarded by the active and standby PCIE switching units and sends the first TLP to a destination EP or a destination RC, thereby implementing reliable transmission of a TLP in a case of a PCIE switching dual-plane networking connection.

Abstract translation: 本发明的实施例公开了一种外围组件互连快速接口控制单元。 该单元包括P2P模块，用于从RC或EP接收第一TLP，并将第一TLP转发到可靠的TLP传输RTT模块进行处理; 可靠的TLP传输模块，被配置为根据接收的第一TLP确定连接到主用和备用PCIE交换单元的发送链路，并且通过发送链路同时将第一TLP发送到主用和备用PCIE交换单元， 使得第一TLP的目的地PCIE接口控制器选择性地接收由主用和备用PCIE交换单元转发的第一TLP，并将第一TLP发送到目的地EP或目的地RC，从而在第一TLP的情况下实现TLP的可靠传输 一个PCIE交换双平面网络连接。

公开(公告)号：US20240323148A1

公开(公告)日：2024-09-26

申请号：US18733318

申请日：2024-06-04

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yongyao LI ,  Jiang ZHU ,  Lv CHEN ,  Yimin YAO ,  Wei LI ,  Can CHEN

IPC: H04L49/00

CPC classification number: H04L49/3036

Abstract: A chip module has a plurality of first ports, at least some or all of the first ports are first selection ports, and each first selection port may act as a write port or a read port. The chip module further includes a first control module. The first control module controls, based on a transmit/receive requirement of the chip module, the first selection port to be switched to a read port or a write port, to match the transmit/receive requirement of the chip module. The first selection port may selectively act as a read port or a write port, so that switching can be performed based on an operating state of the chip module, increasing a read/write bandwidth. The first control module controls an operating state of the first selection port, to flexibly adjust a quantity of read ports and a quantity of write ports of the chip module.

公开(公告)号：US20220307947A1

公开(公告)日：2022-09-29

申请号：US17840347

申请日：2022-06-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Weiqiang XU ,  Xiaochu LI ,  Yimin YAO

IPC: G01M99/00 ,  H01F7/08 ,  G01M3/18 ,  G01M13/003 ,  G01K3/10

Abstract: A detection apparatus and a server are provided, where the apparatus is configured to detect whether a coolant heat pipe or a solenoid valve on the coolant heat pipe in a device is abnormal, and the apparatus includes a control chip. The control chip can control a working state of the solenoid valve. The control chip can further obtain a temperature of a component in the device. When it is detected whether the coolant heat pipe or the solenoid valve is abnormal, the control chip may obtain a temperature difference of the component in the device when the working state of the solenoid valve is controlled, and relatively conveniently determine whether the coolant heat pipe or the solenoid valve is abnormal based on the temperature difference.