公开(公告)号：US07492002B2

公开(公告)日：2009-02-17

申请号：US11323355

申请日：2005-12-30

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  G11C16/0425 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42328

摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。

公开(公告)号：US07429766B2

公开(公告)日：2008-09-30

申请号：US11413640

申请日：2006-04-28

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

摘要： In a split gate type nonvolatile memory device, a supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.

摘要翻译： 在分离栅型非易失性存储器件中，辅助层图案设置在半导体衬底的源极区域上。 由于源区域由于存在辅助层图案而垂直延伸，因此可以增加浮置栅极与源区域和辅助层图案重叠的区域的面积。 因此，形成在源极和浮置栅极之间的电容器的电容增加，使得非易失性存储器件可以在低电压电平下执行编程/擦除操作。

公开(公告)号：US07148110B2

公开(公告)日：2006-12-12

申请号：US11415466

申请日：2006-05-01

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Yong-Tae Kim

IPC分类号： H02L21/336

CPC分类号： H01L27/115 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/4232 ,  H01L29/792

摘要： In a local-length nitride SONOS device and a method for forming the same, a local-length nitride floating gate structure is provided for mitigating or preventing lateral electron migration in the nitride floating gate. The structure includes a thin gate oxide, which leads to devices having a lower threshold voltage. In addition, the local-length nitride layer is self-aligned, which prevents nitride misalignment, and therefore leads to reduced threshold voltage variation among the devices.

摘要翻译： 在本地长度的氮化物SONOS器件及其形成方法中，提供局部长度的氮化物浮栅结构，用于减轻或防止氮化物浮栅中的横向电子迁移。 该结构包括薄栅极氧化物，其导致具有较低阈值电压的器件。 此外，局部长度的氮化物层是自对准的，这防止氮化物不对准，并且因此导致器件之间的阈值电压变化降低。

公开(公告)号：US20080128783A1

公开(公告)日：2008-06-05

申请号：US12027771

申请日：2008-02-07

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/40114 ,  H01L29/66825 ,  H01L29/7881

摘要： A split-gate non-volatile memory device includes a raised oxide layer on a field oxide region between adjacent split-gate memory cells, the raised oxide layer extending onto first and second floating gates included in the adjacent split-gate memory cells covered by a wordline electrically coupled to respective control gates included in the adjacent split-gate memory cells.

摘要翻译： 分闸非易失性存储器件包括在相邻的分裂栅极存储器单元之间的场氧化物区域上的凸起的氧化物层，所述凸起的氧化物层延伸到包括在相邻的分离栅极存储器单元中的第一和第二浮动栅极上， 字线电耦合到相邻分离门存储器单元中包括的相应控制门。

公开(公告)号：US20060170028A1

公开(公告)日：2006-08-03

申请号：US11323355

申请日：2005-12-30

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/76

CPC分类号： H01L27/11521 ,  G11C16/0425 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42328

摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。

公开(公告)号：US20060244042A1

公开(公告)日：2006-11-02

申请号：US11413640

申请日：2006-04-28

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

摘要： In a split gate type nonvolatile memory device and a method of fabricating the same. A supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.

摘要翻译： 在分闸式非易失存储器件及其制造方法中， 辅助层图案设置在半导体衬底的源极区域上。 由于源区域由于存在辅助层图案而垂直延伸，因此可以增加浮置栅极与源区域和辅助层图案重叠的区域的面积。 因此，形成在源极和浮置栅极之间的电容器的电容增加，使得非易失性存储器件可以在低电压电平下执行编程/擦除操作。

公开(公告)号：US20060199359A1

公开(公告)日：2006-09-07

申请号：US11415466

申请日：2006-05-01

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Yong-Tae Kim

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/115 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/4232 ,  H01L29/792

摘要： In a local-length nitride SONOS device and a method for forming the same, a local-length nitride floating gate structure is provided for mitigating or preventing lateral electron migration in the nitride floating gate. The structure includes a thin gate oxide, which leads to devices having a lower threshold voltage. In addition, the local-length nitride layer is self-aligned, which prevents nitride misalignment, and therefore leads to reduced threshold voltage variation among the devices.

摘要翻译： 在本地长度的氮化物SONOS器件及其形成方法中，提供局部长度的氮化物浮栅结构，用于减轻或防止氮化物浮栅中的横向电子迁移。 该结构包括薄栅极氧化物，其导致具有较低阈值电压的器件。 此外，局部长度的氮化物层是自对准的，这防止氮化物不对准，并且因此导致器件之间的阈值电压变化降低。

公开(公告)号：US08059473B2

公开(公告)日：2011-11-15

申请号：US12844234

申请日：2010-07-27

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： G11C11/34

CPC分类号： H01L27/11521 ,  G11C16/0425 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42328

摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。

公开(公告)号：US20100289071A1

公开(公告)日：2010-11-18

申请号：US12844234

申请日：2010-07-27

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  G11C16/0425 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42328

摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。

公开(公告)号：US07791951B2

公开(公告)日：2010-09-07

申请号：US12364570

申请日：2009-02-03

申请人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

发明人： Hee-Seog Jeon ,  Seung-Beom Yoon ,  Jeong-Uk Han ,  Yong-Tae Kim

IPC分类号： G11C11/34

CPC分类号： H01L27/11521 ,  G11C16/0425 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42328

摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。