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1.发明申请Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions and split-gate non-volatile memory cells so formed 失效在场氧化物区域上形成包括凸起的氧化物层的分裂栅极非易失性存储单元的方法和如此形成的分离栅非易失性存储单元公开(公告)号：US20060008984A1
公开(公告)日：2006-01-12
申请号：US11138702
申请日：2005-05-26
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7885
摘要： A method of forming a split-gate non-volatile memory cell can include forming first and second adjacent floating gates self-aligned to a field oxide region therebetween. An oxide layer is formed covering the first and second adjacent floating gates and the field oxide region, the oxide layer electrically isolates the first and second adjacent floating gates from one another. A control gate is formed on the oxide layer on the first and second adjacent floating gates. Related devices are also disclosed.
摘要翻译： 形成分闸非易失性存储单元的方法可以包括形成与其之间的场氧化物区域自对准的第一和第二相邻浮置栅极。 形成覆盖第一和第二相邻浮动栅极和场氧化物区域的氧化物层，氧化物层将第一和第二相邻浮栅彼此电隔离。 控制栅极形成在第一和第二相邻浮动栅极上的氧化物层上。 还公开了相关设备。
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2.发明申请SPLIT-GATE NON-VOLATILE MEMORY CELLS INCLUDING RAISED OXIDE LAYERS ON FIELD OXIDE REGIONS 审中-公开分散栅非挥发性记忆细胞，包括氧化物区域上的氧化物层公开(公告)号：US20080128783A1
公开(公告)日：2008-06-05
申请号：US12027771
申请日：2008-02-07
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/40114 , H01L29/66825 , H01L29/7881
摘要： A split-gate non-volatile memory device includes a raised oxide layer on a field oxide region between adjacent split-gate memory cells, the raised oxide layer extending onto first and second floating gates included in the adjacent split-gate memory cells covered by a wordline electrically coupled to respective control gates included in the adjacent split-gate memory cells.
摘要翻译： 分闸非易失性存储器件包括在相邻的分裂栅极存储器单元之间的场氧化物区域上的凸起的氧化物层，所述凸起的氧化物层延伸到包括在相邻的分离栅极存储器单元中的第一和第二浮动栅极上， 字线电耦合到相邻分离门存储器单元中包括的相应控制门。
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3.发明申请公开(公告)号：US20060170028A1
公开(公告)日：2006-08-03
申请号：US11323355
申请日：2005-12-30
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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4.发明申请公开(公告)号：US20060244042A1
公开(公告)日：2006-11-02
申请号：US11413640
申请日：2006-04-28
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： In a split gate type nonvolatile memory device and a method of fabricating the same. A supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.
摘要翻译： 在分闸式非易失存储器件及其制造方法中， 辅助层图案设置在半导体衬底的源极区域上。 由于源区域由于存在辅助层图案而垂直延伸，因此可以增加浮置栅极与源区域和辅助层图案重叠的区域的面积。 因此，形成在源极和浮置栅极之间的电容器的电容增加，使得非易失性存储器件可以在低电压电平下执行编程/擦除操作。
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5.发明授权Non-volatile memory device with a select gate electrode and a control gate electrode formed on a floating gate 失效具有选择栅电极和形成在浮栅上的控制栅电极的非易失性存储器件公开(公告)号：US07492002B2
公开(公告)日：2009-02-17
申请号：US11323355
申请日：2005-12-30
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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公开(公告)号：US07429766B2
公开(公告)日：2008-09-30
申请号：US11413640
申请日：2006-04-28
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： In a split gate type nonvolatile memory device, a supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue of the presence of the supplementary layer pattern, it is therefore possible to increase an area of a region where a floating gate overlaps the source region and the supplementary layer pattern. Accordingly, the capacitance of a capacitor formed between the source and the floating gate increases so that it is possible for the nonvolatile memory device to perform program/erase operations at a low voltage level.
摘要翻译： 在分离栅型非易失性存储器件中，辅助层图案设置在半导体衬底的源极区域上。 由于源区域由于存在辅助层图案而垂直延伸，因此可以增加浮置栅极与源区域和辅助层图案重叠的区域的面积。 因此，形成在源极和浮置栅极之间的电容器的电容增加，使得非易失性存储器件可以在低电压电平下执行编程/擦除操作。
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公开(公告)号：US08059473B2
公开(公告)日：2011-11-15
申请号：US12844234
申请日：2010-07-27
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： G11C11/34
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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8.发明申请公开(公告)号：US20100289071A1
公开(公告)日：2010-11-18
申请号：US12844234
申请日：2010-07-27
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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公开(公告)号：US07791951B2
公开(公告)日：2010-09-07
申请号：US12364570
申请日：2009-02-03
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
IPC分类号： G11C11/34
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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10.发明申请公开(公告)号：US20090141562A1
公开(公告)日：2009-06-04
申请号：US12364570
申请日：2009-02-03
申请人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
发明人： Hee-Seog Jeon , Seung-Beom Yoon , Jeong-Uk Han , Yong-Tae Kim
CPC分类号： H01L27/11521 , G11C16/0425 , H01L27/115 , H01L27/11524 , H01L29/42328
摘要： A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.
摘要翻译： 非易失性存储器件包括形成在衬底上的栅极绝缘层之间的浮置栅极，形成在浮置栅极上的隧道绝缘层，通过栅极绝缘层引入电荷的选择栅极电极和控制栅电极 通过隧道绝缘层引起电荷隧穿。 选择栅电极与控制栅电极绝缘。 根据非易失性存储器件，在浮动栅极上形成选择栅电极和控制栅电极，从而向相应的栅电极施加电压以写入和擦除数据。
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