公开(公告)号：US20240312895A1

公开(公告)日：2024-09-19

申请号：US18672681

申请日：2024-05-23

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Huibin Chen ,  Yutao Wang ,  Haiyan Liu ,  Song Chen ,  Zhonghua Yin ,  Zhen Lv ,  Zhaoyue Wang ,  Qiliang Yang

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L23/49838 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/26 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181

Abstract: A power module is provided that may include a first metal-clad substrate, a chip located on a side of the first metal-clad substrate, and first solder located between the first metal-clad substrate and the chip. A first metal layer is disposed on a surface that is of the first metal-clad substrate and that faces the chip, and the first metal layer includes a groove and a blocking part. A first thickness of the first metal layer is less than a second thickness. The first thickness is a thickness of at least a part of an area in the blocking part, and the second thickness is a thickness of the first metal layer in an area other than the groove and the blocking part. The blocking part is located between the chip and the adjacent groove, and is configured to prevent the first solder from overflowing into the groove.

公开(公告)号：US20250079387A1

公开(公告)日：2025-03-06

申请号：US18822629

申请日：2024-09-03

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Hui LI ,  Sizhan Zhou ,  Zhaoyue Wang ,  Huibin Chen ,  Huaibin Zhao ,  Junhe Wang ,  Yafei LV

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/16 ,  H01L29/417

Abstract: A power module includes: a first metal brazed substrate; a chipset disposed on the first metal brazed substrate, where the chipset includes at least two chips; and a clip, where the clip covers a side, away from the first metal brazed substrate, of the chipset. Each connecting unit is electrically connected to a corresponding chip. Every two adjacent connecting units are connected along a first direction through a body. Each connecting arm is arranged with respect to two adjacent chips in the chipset. The connecting arm is connected to the first metal brazed substrate. A shortest distance between the connecting arm and one of the two adjacent chips is a first shortest distance, a shortest distance between the connecting arm and the other of the two adjacent chips is a second shortest distance. A difference between the first shortest distance and the second shortest distance falls within a preset threshold.