公开(公告)号：US20250079387A1

公开(公告)日：2025-03-06

申请号：US18822629

申请日：2024-09-03

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Hui LI ,  Sizhan Zhou ,  Zhaoyue Wang ,  Huibin Chen ,  Huaibin Zhao ,  Junhe Wang ,  Yafei LV

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/16 ,  H01L29/417

Abstract: A power module includes: a first metal brazed substrate; a chipset disposed on the first metal brazed substrate, where the chipset includes at least two chips; and a clip, where the clip covers a side, away from the first metal brazed substrate, of the chipset. Each connecting unit is electrically connected to a corresponding chip. Every two adjacent connecting units are connected along a first direction through a body. Each connecting arm is arranged with respect to two adjacent chips in the chipset. The connecting arm is connected to the first metal brazed substrate. A shortest distance between the connecting arm and one of the two adjacent chips is a first shortest distance, a shortest distance between the connecting arm and the other of the two adjacent chips is a second shortest distance. A difference between the first shortest distance and the second shortest distance falls within a preset threshold.

公开(公告)号：US20230395556A1

公开(公告)日：2023-12-07

申请号：US18452108

申请日：2023-08-18

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Zhihua Liu ,  Huibin Chen

IPC: H01L23/00 ,  H01L25/16 ,  H01L23/373 ,  H01L23/498

CPC classification number: H01L24/40 ,  H01L25/162 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/4985 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/40091 ,  H01L2224/40137 ,  H01L2224/4024 ,  H01L2924/13091

Abstract: A packaged structure includes a first substrate and a second substrate. Power units are disposed on a first surface of the first substrate. A control unit is disposed on a first surface of the second substrate, and the second substrate is connected to one end of the first substrate. The control unit is electrically connected to the power units. The control unit is configured to: receive an external input signal, collect an internal sensing signal, and control the power units to work. The first surface of the second substrate is disposed on a same side as the first surface of the first substrate. When the structure is used, a signal part and a power part are integrated. The power units are disposed on the first substrate, and the control unit is disposed on the second substrate, so that the signal part and the power part can be separately disposed.

公开(公告)号：US20250070055A1

公开(公告)日：2025-02-27

申请号：US18942743

申请日：2024-11-10

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Fengqun Lang ,  Hui Li ,  Sizhan Zhou ,  Haiyan Liu ,  Huibin Chen ,  Zhen Lv ,  Chunfu HU

IPC: H01L23/58 ,  B60L53/51 ,  H01L23/367 ,  H01L31/02

Abstract: A power module includes a first metal layer-coated substrate, a plurality of chips, and a first connection piece. A first electrode of each chip is electrically connected to a first metal layer of the first metal layer-coated substrate. The first connection piece includes a first main body part and a plurality of first contact parts. A second electrode of each of the plurality of chips is in contact with at least one of the first contact parts. A part of the first main body part is between at least one pair of adjacent first contact parts. A current flowing out from the chip directly flows to the first main body part through the first contact part. The chips are connected in parallel by using the first connection piece.

公开(公告)号：US20240312895A1

公开(公告)日：2024-09-19

申请号：US18672681

申请日：2024-05-23

Applicant: Huawei Digital Power Technologies Co., Ltd.

Inventor： Huibin Chen ,  Yutao Wang ,  Haiyan Liu ,  Song Chen ,  Zhonghua Yin ,  Zhen Lv ,  Zhaoyue Wang ,  Qiliang Yang

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L23/49838 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/26 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181

Abstract: A power module is provided that may include a first metal-clad substrate, a chip located on a side of the first metal-clad substrate, and first solder located between the first metal-clad substrate and the chip. A first metal layer is disposed on a surface that is of the first metal-clad substrate and that faces the chip, and the first metal layer includes a groove and a blocking part. A first thickness of the first metal layer is less than a second thickness. The first thickness is a thickness of at least a part of an area in the blocking part, and the second thickness is a thickness of the first metal layer in an area other than the groove and the blocking part. The blocking part is located between the chip and the adjacent groove, and is configured to prevent the first solder from overflowing into the groove.