Field effect transistor structure for minimizing parasitic inversion and process for fabricating
    1.
    发明授权
    Field effect transistor structure for minimizing parasitic inversion and process for fabricating 失效
    用于最小化PARASITIC逆变的场效应晶体管结构和制造方法

    公开(公告)号:US3860454A

    公开(公告)日:1975-01-14

    申请号:US37415273

    申请日:1973-06-27

    Applicant: IBM

    CPC classification number: H01L21/00 H01L21/18 H01L29/00 H01L29/66477

    Abstract: A process for fabricating a field effect transistor having minimal parasitic inversion wherein a field layer of insulating material is formed on a monocrystalline substrate having spaced source and drain regions, an opening formed in the field layer over the gate region, and the body bombarded with impurity ions of the same type as the background doping of the semiconductor body, the bombarding done at an energy sufficient to traverse the field insulation layer to produce an increased concentration of impurity ions just beneath the interface of the semiconductor body and field oxide, and a buried layer of impurity in the gate region.

    Abstract translation: 一种用于制造具有最小寄生反转的场效应晶体管的工艺,其中绝缘材料的场层形成在具有间隔的源极和漏极区域的单晶衬底上,在栅极区域上形成在场层中的开口,以及用杂质轰击的体 与半导体本体的背景掺杂相同类型的离子,以足以穿过场绝缘层的能量进行轰击,以产生正好在半导体主体和场氧化物的界面之下的杂质离子的增加的浓度,以及掩埋 栅极区杂质层。

    Method for producing improved transistor devices
    2.
    发明授权
    Method for producing improved transistor devices 失效
    用于制造改进的晶体管器件的方法

    公开(公告)号:US3873372A

    公开(公告)日:1975-03-25

    申请号:US37785173

    申请日:1973-07-09

    Applicant: IBM

    Abstract: The invention is concerned with methods for producing improved semiconductor devices. The invention is advantageously employable in the fabrication of insulated-gate field-effect transistor devices. The problem of accurately aligning the gate electrode over the channel region, lying between the source region and the drain region of a field effect transistor, is particularly addressed and solved. Accurate and precise field protection of all areas of the field-effect transistor surrounding the channel, source and drain regions is simply and effectively accomplished. The proper alignment of the gate electrode is largely accomplished by utilizing essentially the same mask structure to define the gate, source and drain regions. The same mask structure is utilized to define the area that is field protected.

    Abstract translation: 本发明涉及用于制造改进的半导体器件的方法。 本发明有利地用于制造绝缘栅场效应晶体管器件。 特别地解决和解决了位于场效应晶体管的源极区域和漏极区域之间的沟道区域上的栅极电极准确对准的问题。 围绕通道,源极和漏极区域的场效应晶体管的所有区域的精确和精确的场保护被简单有效地完成。 通过利用基本上相同的掩模结构来限定栅极,源极和漏极区域,栅电极的适当对准很大程度上实现。 使用相同的掩模结构来定义被现场保护的区域。

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