Abstract:
The display device has an electrically conductive phosphorcoated transparent screen, a panel element disposed in close parallel relation to the screen with the panel having an array of electron emitting regions on a semiconductor plate, each controlled by an adjacent memory cell in the plate. An enclosure which includes the screen surrounds the panel. An electric potential is established between the screen and the panel, and a vacuum produced in the enclosure. Preferably, the memory cells associated with the electron emitting regions are storage elements of a shift register which extend throughout the entire array of electron emitters. A binary signal is introduced into the shift register which is used to establish a predetermined pattern of electron emitting regions on the semiconductor panel. This produces a display on the spaced transparent screen when the emitted electrons strike the phosphor on the screen.
Abstract:
A process for fabricating a field effect transistor having minimal parasitic inversion wherein a field layer of insulating material is formed on a monocrystalline substrate having spaced source and drain regions, an opening formed in the field layer over the gate region, and the body bombarded with impurity ions of the same type as the background doping of the semiconductor body, the bombarding done at an energy sufficient to traverse the field insulation layer to produce an increased concentration of impurity ions just beneath the interface of the semiconductor body and field oxide, and a buried layer of impurity in the gate region.