公开(公告)号：US3868723A

公开(公告)日：1975-02-25

申请号：US42426773

申请日：1973-12-13

Applicant: IBM

Inventor： LECHATON JOHN S ,  RICHARD LEO P ,  SMITH DARYL C

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/06 ,  H01L29/49 ,  H01L11/00 ,  H01L15/00

CPC classification number: H01L29/4966 ,  H01L21/76819 ,  H01L23/5226 ,  H01L29/0638 ,  H01L29/495 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A method of partially planarizing an electrically insulative layer over an integrated circuit substrate which has a raised line metallization pattern having narrower lines and wider lines. The insulative layer has narrower and wider elevations corresponding to the underlying lines. Resputtering of said insulative layer is conducted for an amount of time sufficient to planarize the narrower elevations in the layer but insufficient to so planarize its wider elevations. This method is useful in planarizing insulative layer elevations through which via holes are to be formed, particularly via holes which are wider than the underlying metallizing lines which they contact. Such a planarization method in via hole formation avoids the tunneling effects which would otherwise result from the over-chemical etching necessary to form the via holes.

Abstract translation: 一种在集成电路基板上部分平坦化电绝缘层的方法，所述集成电路基板具有具有窄线和宽线的凸起线金属化图案。 绝缘层具有对应于底层线的较窄和较宽的高度。 进行所述绝缘层的再溅射一段时间，足以平坦化层中较窄的高度，但不足以平坦化其较高的高度。 该方法可用于平坦化通过其形成通孔的绝缘层高度，特别是通孔比它们接触的下面的金属化线更宽。 通孔形成中的这种平面化方法避免了由形成通孔所必需的过度化学蚀刻而导致的隧道效应。

公开(公告)号：US3664942A

公开(公告)日：1972-05-23

申请号：US3664942D

申请日：1970-12-31

Applicant: IBM

Inventor： HAVAS JANOS ,  LECHATON JOHN S

IPC: C23F4/00 ,  H01J37/32 ,  C23C15/00

CPC classification number: H01J37/32935 ,  C23F4/00

Abstract: The end point in sputter-etching metal layers, for example, from substrates is determined by employing a silicon, quartz, or the like, monitor control wafer in the sputter-etching environment which wafer has been previously coated with said metal, for example, in the same run as that used to fabricate the workpiece substrate. Thus, the monitor control wafer exhibits the same thickness of metal, or the like, as the thickness of the metal layer to be selectively sputter-etched from the substrate. The temperature exhibited by the monitor control wafer during the sputter-etching material removal process in monitored by an infrared radiation thermometer, by way of a quartz window. When the layer of metal, or the like, has been removed from the monitor control wafer, the temperature, as sensed by the infrared radiation thermometer during sputter-etching, declines thereby indicating the end point in the removal process of the metal layer, or the like.

Abstract translation: 例如通过采用硅，石英等在溅射蚀刻金属层中的溅射蚀刻金属层中的终点，通过采用硅，石英等来监测晶片已经预先用所述金属涂覆的溅射蚀刻环境中的控制晶片， 与用于制造工件基板的操作相同。 因此，作为要从基板选择性地溅射蚀刻的金属层的厚度，监视器控制晶片呈现相同厚度的金属等。 在溅射蚀刻材料去除过程期间由监测控制晶片呈现的温度由红外辐射温度计通过石英窗监测。 当已经从监视器控制晶片去除了金属层等时，在溅射蚀刻期间由红外辐射温度计感测到的温度下降，从而表明金属层的去除过程中的终点，或 类似。