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公开(公告)号：US2872671A
公开(公告)日：1959-02-03
申请号：US60300056
申请日：1956-08-09
Applicant: IBM
Inventor： WALTON CHARLES A
IPC: H03M1/00
CPC classification number: H03M1/308
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Patent Agency Ranking
公开(公告)号：US3521141A
公开(公告)日：1970-07-21
申请号：US3521141D
申请日：1967-10-30
Applicant: IBM
Inventor： WALTON CHARLES A
CPC classification number: H03K17/04 , G11C27/024 , G11C27/026
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公开(公告)号：US3289168A
公开(公告)日：1966-11-29
申请号：US21377262
申请日：1962-07-31
Applicant: IBM
Inventor： WALTON CHARLES A , BENNETT RICHARD W
IPC: G06F13/26
CPC classification number: G06F13/26
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公开(公告)号：US3566397A
公开(公告)日：1971-02-23
申请号：US3566397D
申请日：1969-01-15
Applicant: IBM
Inventor： WALTON CHARLES A
Abstract: AN ANALOG TO DIGITAL CONVERTER IS SHOWN WHEREIN AN AMPLIFIER IS CONNECTED IN THE CONVERTER CIRCUIT TO PERFORM BOTH FUNCTIONS OF AMPLIFICATION AND INTEGRATION AS WELL AS PROVIDING A HIGH INPUT IMPEDANCE. THE CONVERTER INPUT IS SHORTED WHILE DRIFT VOLTAGES DUE TO THE AMPLIFIER INTEGRATOR ARE COMPENSATED BY AMPLIFYING THE DRIFT VOLTAGE AND UTILIZING THE AMPLIFIED VALUE AS DRIFT COMPENSATION BY FEEDBACK TO THE INPUT. AN UNKNOWN VOLTAGE SIGNAL IS NEXT COUPLED TO THE POTENTIOMETRIC FEEDBACK CONNECTED AMPLIFIER AND THE INPUT SIGNAL IS INTEGRATED FOR A PREDETERMINED TIME. A REFERENCE VOLTAGE OF LIKE SIGN TO THE UNKNOWN ANALOG SIGNAL IS THEN INTEGRATED WHILE THE AMPLIFIER IS CONNECTED AS AN INVERTING INTEGRATOR. THE TIME THAT IS NECESSARY FOR THE INTEGRATOR OUTPUT VOLTAGE TO REACH ITS INITIAL ZERO LEVEL IS MEASURED BY A DIGITAL REPRESENTATION GENERATING MEANS SUCH AS A COUNTER AND YIELDS A DIGITAL REPRESENTATION OF THE INPUT ALONG SIGNAL.
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公开(公告)号：US3028087A
公开(公告)日：1962-04-03
申请号：US70302357
申请日：1957-12-16
Applicant: IBM
Inventor： WALTON CHARLES A
IPC: G06F7/46
CPC classification number: G06F7/462
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