Abstract:
A motor drive is provided, which includes a control circuit, a first transistor, a first comparison circuit, a second transistor and a load. The control circuit includes a first output terminal and a second output terminal; the first output terminal outputs a first control signal; the second output terminal outputs a second control signal whose phase is inverse to the phase of the first control signal. The gate of the first transistor receives the first control signal. The first comparison circuit compares the gate-source voltage with a reference voltage to generate a first comparison signal. When the first comparison signal shows that the first control signal is reduced to be lower than the reference voltage, the second control signal generated by the second output terminal is transmitted to the gate of the second transistor.
Abstract:
An output torque calculation device and a method thereof is provided, and the output torque calculation device includes a first sensor, a second sensor, a rotor, a reducer, a processor, and an elastic device. An input portion of the reducer and an output portion of the reducer are respectively connected to the rotor and an input portion of the elastic device, and an output portion of the elastic device is configured to connect to a load. The output torque calculation method comprises: detecting a first angle of the rotor by the first sensor; detecting a second angle of the output portion of the elastic device by the second sensor; and calculating a torque carried by a final output end of the output torque calculation device by the processor according to the first angle and the second angle.
Abstract:
The disclosure provides an interlocking device and a three-phase interlocking device for a DC to AC converter (DAC). The interlocking device includes a first interlocking circuit and a second interlocking circuit. The first interlocking circuit couples with a first switch and a second switch, controls whether to conduct the first switch according to the logic levels of a first signal, a second signal and a third signal, and controls whether to conduct the second switch according to the logic levels of the first signal and the second signal. The second interlocking circuit couples with a third switch and a fourth switch, controls whether to conduct the third switch according to the logic levels of the first signal, the third signal and a fourth signal, and controls whether to turn on the fourth switch according to the logic levels of the third signal and the fourth signal.