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公开(公告)号:US20170169537A1
公开(公告)日:2017-06-15
申请号:US15365863
申请日:2016-11-30
Applicant: INTEL CORPORATION
Inventor: DANIEL NEMIROFF , ANOOP MUKKER , ZHENYU ZHU , ARVIND KUMAR
CPC classification number: G06T1/20 , G06F3/0416 , G06T1/60
Abstract: A mechanism is described for facilitating accelerated touch processing in computing environments. A method of embodiments, as described herein, includes transferring, by a touch engine, touch data from the touch sensor to memory, where the touch sensor is coupled to a touch controller and a touch processor. The method may further include monitoring, by a touch sequencer, the touch data being maintained in the memory and holding off on processing of the touch data by one or more components of a computing device until one or more coordinates are received from the touch processor.
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公开(公告)号:US20170090509A1
公开(公告)日:2017-03-30
申请号:US14866237
申请日:2015-09-25
Applicant: Intel Corporation
Inventor: ANOOP MUKKER , ENG HUN OOI , ROBERT J. ROYER, JR. , BRIAN R. MCFARLANE
CPC classification number: G06F1/08 , G06F1/12 , G06F13/40 , G06F13/4291 , H04J3/0697
Abstract: These present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negation component to negotiate a shift in an operating frequency with other component on an interface where the different component have non-common clocks.
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公开(公告)号:US20180307263A1
公开(公告)日:2018-10-25
申请号:US15960074
申请日:2018-04-23
Applicant: INTEL CORPORATION
Inventor: ANOOP MUKKER , ENG HUN OOI , ROBERT J. ROYER, JR. , BRIAN R. MCFARLANE
CPC classification number: G06F1/08 , G06F1/12 , G06F13/40 , G06F13/4291 , H04J3/0697
Abstract: The present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negotiation component to negotiate a shift in an operating frequency with other component on an interface where the different components have non-common clocks.
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公开(公告)号:US20150212969A1
公开(公告)日:2015-07-30
申请号:US14678712
申请日:2015-04-03
Applicant: Intel Corporation
Inventor: Karthi R. Vadivelu , SRIDHARAN RANGANATHAN , ANOOP MUKKER , SATHEESH CHELLAPPAN
CPC classification number: G06F13/426 , G06F13/122 , G06F13/126 , G06F13/387 , G06F13/4265 , Y02D10/14 , Y02D10/151
Abstract: An interface for low power, high bandwidth communications between units in a device in provided herein. The interface comprises a USB 3.0 system interface and a SuperSpeed inter-chip (SSIC) protocol adaptor configured to facilitate communications between the USB3.0 system interface and an M-PHY interface, wherein the SSIC is configured to issue remote register access protocol (RRAP) commands through a local M-PHY to a remote M-PHY in a low speed burst mode.
Abstract translation: 用于本文提供的设备中的单元之间的低功率,高带宽通信的接口。 该接口包括USB 3.0系统接口和配置为促进USB3.0系统接口和M-PHY接口之间的通信的SuperSpeed芯片间(SSIC)协议适配器,其中SSIC配置为发出远程注册访问协议(RRAP )通过本地M-PHY以低速突发模式命令到远程M-PHY。
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