公开(公告)号：US20180307263A1

公开(公告)日：2018-10-25

申请号：US15960074

申请日：2018-04-23

Applicant: INTEL CORPORATION

Inventor： ANOOP MUKKER ,  ENG HUN OOI ,  ROBERT J. ROYER, JR. ,  BRIAN R. MCFARLANE

IPC: G06F1/08 ,  G06F13/42 ,  G06F1/12 ,  G06F13/40 ,  H04J3/06

CPC classification number: G06F1/08 ,  G06F1/12 ,  G06F13/40 ,  G06F13/4291 ,  H04J3/0697

Abstract: The present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negotiation component to negotiate a shift in an operating frequency with other component on an interface where the different components have non-common clocks.

公开(公告)号：US20170091127A1

公开(公告)日：2017-03-30

申请号：US14866310

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： JAWAD B. KHAN ,  RANDALL K. WEBB ,  KELVIN D. GREEN ,  BRIAN R. MCFARLANE

IPC: G06F13/16 ,  G06F13/42 ,  G06F13/10 ,  G06F13/40

CPC classification number: G06F13/1668 ,  G06F13/102 ,  G06F13/4068 ,  G06F13/4282

Abstract: Examples may include techniques to couple with a storage device via multiple communication ports. A first communication port at the storage device may be configurable to couple with at least one other storage device, a field programmable gate array (FPGA)/programmable logic or application-specific integrated circuit (ASIC) via a serial communication link. A second communication port at the storage device is arranged to couple with a host computing device.

公开(公告)号：US20170090509A1

公开(公告)日：2017-03-30

申请号：US14866237

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： ANOOP MUKKER ,  ENG HUN OOI ,  ROBERT J. ROYER, JR. ,  BRIAN R. MCFARLANE

IPC: G06F1/08 ,  G06F1/12

CPC classification number: G06F1/08 ,  G06F1/12 ,  G06F13/40 ,  G06F13/4291 ,  H04J3/0697

Abstract: These present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negation component to negotiate a shift in an operating frequency with other component on an interface where the different component have non-common clocks.