NON-VOLATILE MEMORY USING A REDUCED NUMBER OF INTERCONNECT TERMINALS

    公开(公告)号:US20190042087A1

    公开(公告)日:2019-02-07

    申请号:US15843545

    申请日:2017-12-15

    Abstract: A first signal may be received from a memory device at a first interconnect terminal of a number of interconnect terminals via a serial communication interface that indicates the memory device includes a NAND type memory device. Whether a second signal that indicates the NAND type memory device is initialized has been received from the memory device at a second interconnect terminal of the number of interconnect terminals may be determined. An operation associated with the NAND type memory device may be performed at the second interconnect terminal and a third interconnect terminal in response to determining the second signal has been received from the memory device indicating the NAND type memory device is initialized.

    ACCELERATED TOUCH PROCESSING IN COMPUTING ENVIRONMENTS

    公开(公告)号:US20170169537A1

    公开(公告)日:2017-06-15

    申请号:US15365863

    申请日:2016-11-30

    CPC classification number: G06T1/20 G06F3/0416 G06T1/60

    Abstract: A mechanism is described for facilitating accelerated touch processing in computing environments. A method of embodiments, as described herein, includes transferring, by a touch engine, touch data from the touch sensor to memory, where the touch sensor is coupled to a touch controller and a touch processor. The method may further include monitoring, by a touch sequencer, the touch data being maintained in the memory and holding off on processing of the touch data by one or more components of a computing device until one or more coordinates are received from the touch processor.

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