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公开(公告)号：US20220120852A1
公开(公告)日：2022-04-21
申请号：US16949251
申请日：2020-10-21
Applicant: Infineon Technologies AG
Inventor： Rainer FINDENIG , Bernhard GRESLEHNER-NIMMERVOLL
Abstract: A radar device may include a memory to store a program associated with operating the radar device. The radar device may include a decoder to read the program from the memory, and generate a control value and a timestamp based at least in part on the program. The control value may be a value to be provided as an input to a component of the radar device at a time indicated by the timestamp. The radar device may include a first-in first-out (FIFO) buffer to store at least the control value and provide the control value as the input to the component of the radar device at the time indicated by the timestamp.
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公开(公告)号：US20230176180A1
公开(公告)日：2023-06-08
申请号：US17541687
申请日：2021-12-03
Applicant: Infineon Technologies AG
Inventor： Rainer FINDENIG , Bernhard GRESLEHNER-NIMMERVOLL , Grigory ITKIN , Markus Josef LANG , Ulrich MOELLER , Martin WIESSFLECKER
Abstract: A radar semiconductor chip includes a radar circuit component configured to generate at least part of a frequency-modulated ramp signal or process at least part of a reflected frequency-modulated ramp signal according to a control parameter; a memory configured to store a sequencing program associated with regulating the control parameter, wherein the sequencing program specifies a first data source, external to the sequencing program, that is configured to provide a first data value corresponding to the control parameter; and a decoder configured to read the sequencing program, access the first data value from the first data source specified by the sequencing program, derive a first control value for the control parameter from the first data value, and provide the first control value to the radar circuit component. The radar circuit component regulates a controlled circuit function in accordance with the control parameter based on the first control value.
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Patent Agency Ranking
公开(公告)号：US20230118317A1
公开(公告)日：2023-04-20
申请号：US17506048
申请日：2021-10-20
Applicant: Infineon Technologies AG
Inventor： Alexander MELZER , Rainer FINDENIG
Abstract: A radio frequency (RF) circuit includes an input terminal configured to receive a reception signal from an antenna; an output terminal configured to output a digital output signal; a receive path including a mixer and an analog-to-digital converter (ADC), wherein the receive path is coupled to and between the input and output terminals, wherein the receive path includes an analog portion and a digital portion, and wherein the ADC generates a digital signal based on an analog signal received from the analog portion; a test signal generator configured to generate an analog test signal injected into the analog portion of the receive path; and a digital processor configured to receive a digital test signal from the digital portion, the digital test signal being derived from the analog test signal, analyze a frequency spectrum of the digital test signal, and determine a quality of the digital test signal.
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公开(公告)号：US20250036768A1
公开(公告)日：2025-01-30
申请号：US18360903
申请日：2023-07-28
Applicant: Infineon Technologies AG
Inventor： Bernhard GRESLEHNER-NIMMERVOLL , Rainer FINDENIG
Abstract: A radar semiconductor chip includes a ramp signal generator configured to generate a frequency-modulated ramp signal comprising a plurality of frequency ramps of a ramp scenario; a first memory configured to store a sequencing program associated with generating the frequency-modulated ramp signal; a second memory configured to store a firmware program corresponding to a firmware opcode of the sequencing program; a sequencer configured to derive control values for a plurality of ramp parameters based on a plurality of ramp opcodes of the sequencing program, provide the control values to the ramp signal generator, and provide a start signal to start an execution of a firmware call in response to reading the firmware opcode; and a central processing unit configured to receive the start signal from the sequencer and, in response to the start signal, execute the firmware program from the second memory in parallel to the ramp scenario.
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5.发明申请公开(公告)号：US20220381880A1
公开(公告)日：2022-12-01
申请号：US17819002
申请日：2022-08-11
Applicant: Infineon Technologies AG
Inventor： Christian SCHMID , Rainer FINDENIG , Bernhard GRESLEHNER-NIMMERVOLL
Abstract: A semiconductor chip comprising at least one transmit channel and/or at least one receive channel for radar signals and also a sequencing circuit is proposed. In this case, the sequencing circuit is configured centrally to determine a sequencing scheme for time-dependent functions of the transmit channel and/or of the receive channel and to drive circuit elements of the transmit channel and/or of the receive channel in accordance with the sequencing scheme.
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6.发明申请公开(公告)号：US20220034998A1
公开(公告)日：2022-02-03
申请号：US16943365
申请日：2020-07-30
Applicant: Infineon Technologies AG
Inventor： Francesco LOMBARDO , George EFTHIVOULIDIS , Rainer FINDENIG , Alexander MELZER
Abstract: A radar system is provided that includes a radar monolithic microwave integrated circuit (MIMIC). The radar MMIC includes a plurality of radar signal channels; and at least one sensor configured to measure a physical parameter related to a temperature of the radar MIMIC, and to generate sensor data corresponding to measured values of the physical parameter; and a controller configured to receive the sensor data from the at least one sensor, and to determine a channel operation of the plurality of radar signal channels, including selectively disabling at least a first radar signal channel of the plurality of radar signal channels and selectively enabling at least a second radar signal channel of the plurality of radar signal channels based on the measured values.
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7.发明申请公开(公告)号：US20190250247A1
公开(公告)日：2019-08-15
申请号：US16262987
申请日：2019-01-31
Applicant: Infineon Technologies AG
Inventor： Christian SCHMID , Rainer FINDENIG , Bernhard GRESLEHNER-NIMMERVOLL
CPC classification number: G01S7/4004 , G01S7/03 , G01S7/35 , G01S7/4056 , G01S13/87
Abstract: A semiconductor chip comprising at least one transmit channel and/or at least one receive channel for radar signals and also a sequencing circuit is proposed. In this case, the sequencing circuit is configured centrally to determine a sequencing scheme for time-dependent functions of the transmit channel and/or of the receive channel and to drive circuit elements of the transmit channel and/or of the receive channel in accordance with the sequencing scheme.
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