公开(公告)号：US20230350687A1

公开(公告)日：2023-11-02

申请号：US18143513

申请日：2023-05-04

Applicant: Intel Corporation

Inventor： ROBERT S. CHAPPELL ,  JASON W. BRANDT ,  ALAN COX ,  ASIT MALLICK ,  JOSEPH NUZMAN ,  ARJAN VAN DE VEN

IPC: G06F9/38 ,  G06F9/30 ,  G06F21/55

CPC classification number: G06F9/3842 ,  G06F9/30145 ,  G06F21/556 ,  G06F9/30058 ,  G06F2221/033

Abstract: Embodiments of instructions are detailed herein including one or more of 1) a branch fence instruction, prefix, or variants (BFENCE); 2) a predictor fence instruction, prefix, or variants (PFENCE); 3) an exception fence instruction, prefix, or variants (EFENCE); 4) an address computation fence instruction, prefix, or variants (AFENCE); 5) a register fence instruction, prefix, or variants (RFENCE); and, additionally, modes that apply the above semantics to some or all ordinary instructions.

公开(公告)号：US20190324756A1

公开(公告)日：2019-10-24

申请号：US16236049

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： ROBERT S. CHAPPELL ,  JASON W. BRANDT ,  ALAN COX ,  ASIT MALLICK ,  JOSEPH NUZMAN ,  ARJAN VAN DE VEN

IPC: G06F9/38 ,  G06F9/30 ,  G06F21/55

Abstract: Embodiments of instructions are detailed herein including one or more of 1) a branch fence instruction, prefix, or variants (BFENCE); 2) a predictor fence instruction, prefix, or variants (PFENCE); 3) an exception fence instruction, prefix, or variants (EFENCE); 4) an address computation fence instruction, prefix, or variants (AFENCE); 5) a register fence instruction, prefix, or variants (RFENCE); and, additionally, modes that apply the above semantics to some or all ordinary instructions.