公开(公告)号：US20230051227A1

公开(公告)日：2023-02-16

申请号：US17978426

申请日：2022-11-01

申请人： Intel Corporation

发明人： Michal Mrozek ,  Bartosz Dunajski ,  Ben Ashbaugh ,  Brandon Fliflet

IPC分类号： G06T1/60 ,  G06T1/20 ,  G06F3/06

摘要： An apparatus to facilitate processing in a multi-tile device is disclosed. In one embodiment, the apparatus includes a graphics processor comprising a first semiconductor die including a first high-bandwidth memory (HBM) device, a second semiconductor die including a second HBM device, and a third semiconductor die coupled with the first semiconductor die and the second semiconductor die in a 2.5-dimensional (2.5D) arrangement. The third semiconductor die includes a graphics processing resource and a cache coupled with the graphics processing resource. The cache is configurable to cache data associated with memory accessed by the graphics processing resource and the graphics processing resource includes a general-purpose graphics processor core and a tensor core.

公开(公告)号：US11907756B2

公开(公告)日：2024-02-20

申请号：US16796836

申请日：2020-02-20

申请人： Intel Corporation

发明人： Bartosz Dunajski ,  Brandon Fliflet ,  Michal Mrozek

IPC分类号： G06F9/48 ,  G06F9/30 ,  G06F9/54 ,  G06F9/50 ,  G06F9/448 ,  G06T1/20 ,  G06T1/60

CPC分类号： G06F9/4881 ,  G06F9/30003 ,  G06F9/3009 ,  G06F9/4482 ,  G06F9/485 ,  G06F9/544 ,  G06F9/546 ,  G06T1/20 ,  G06F9/505 ,  G06F9/5044 ,  G06T1/60

摘要： A graphics processing apparatus that includes at least a memory device and an execution unit coupled to the memory. The memory device can store a command buffer with at least one command that is dependent on completion of at least one other command. The command buffer can include a jump command that causes a jump to a location in the command buffer to identify any unscheduled command. The execution unit is to jump to a location in the command buffer based on execution of the jump command. The execution unit is to perform one or more jumps to one or more locations in the command buffer to attempt to schedule a command with dependency on completion of at least one other command until the command with a dependency on completion of at least one other command is scheduled.

公开(公告)号：US20220156879A1

公开(公告)日：2022-05-19

申请号：US16951217

申请日：2020-11-18

申请人： Intel Corporation

发明人： Michal Mrozek ,  Bartosz Dunajski ,  Ben Ashbaugh ,  Brandon Fliflet

IPC分类号： G06T1/60 ,  G06T1/20 ,  G06F3/06

摘要： An apparatus to facilitate processing in a multi-tile device is disclosed. The apparatus comprises a plurality of processing tiles, each including a memory device and a plurality of processing resources, coupled to the device memory, and a memory management unit to manage the memory devices in each of the plurality of tiles to perform allocation of memory resources among the memory devices for execution by the plurality of processing resources.