公开(公告)号：US20160018883A1

公开(公告)日：2016-01-21

申请号：US14867490

申请日：2015-09-28

Applicant: Intel Corporation

Inventor： Ankush VARMA ,  Krishnakanth V. SISTLA ,  Cesar A. QUIROZ ,  Vivek GARG ,  Martin T. ROWLAND ,  Inder M. SODHI ,  James S. BURNS

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/26 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/14 ,  Y02D10/172

Abstract: A method and apparatus for dynamic power limit sharing among the modules in the platform. In one embodiment of the invention, the platform comprises a processor and memory modules. By expanding the power domain to include the processor and the memory modules, dynamic sharing of the power budget of the platform between the processor and the memory modules is enabled. For low-bandwidth workloads, the dynamic sharing of the power budget offers significant opportunity for the processor to increase its frequency by using the headroom in the memory power and vice versa. This enables higher peak performance for the same total platform power budget in one embodiment of the invention.