Dynamic reconfigurable dual power I/O receiver

    公开(公告)号:US10672438B2

    公开(公告)日:2020-06-02

    申请号:US16147635

    申请日:2018-09-29

    Abstract: An apparatus is provided which comprises: a first circuitry to sample a first input signal to generate a first sampled signal, and to sample a second input signal to generate a second sampled signal, wherein the first input signal comprises data; a second circuitry to receive the first sampled signal and the second sampled signal, and to generate a first pair of differential signals; an offset cancellation circuitry to cancel or reduce an offset in the first pair of differential signals; and a latch to receive the first pair of differential signals subsequent to the cancellation or reduction of the offset, and to output a second pair of differential signals, wherein the second pair of differential signals is indicative of the data.

    DYNAMIC RECONFIGURABLE DUAL POWER I/O RECEIVER

    公开(公告)号:US20200105319A1

    公开(公告)日:2020-04-02

    申请号:US16147635

    申请日:2018-09-29

    Abstract: An apparatus is provided which comprises: a first circuitry to sample a first input signal to generate a first sampled signal, and to sample a second input signal to generate a second sampled signal, wherein the first input signal comprises data; a second circuitry to receive the first sampled signal and the second sampled signal, and to generate a first pair of differential signals; an offset cancellation circuitry to cancel or reduce an offset in the first pair of differential signals; and a latch to receive the first pair of differential signals subsequent to the cancellation or reduction of the offset, and to output a second pair of differential signals, wherein the second pair of differential signals is indicative of the data.

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