公开(公告)号：US20240330053A1

公开(公告)日：2024-10-03

申请号：US18194408

申请日：2023-03-31

Applicant: Intel Corporation

Inventor： Andrew J. Herdrich ,  Philip Abraham ,  Priya Autee ,  Stephen Van Doren ,  Yen-Cheng Liu ,  Rajesh Sankaran ,  Kameswar Subramaniam ,  Ritesh Parikh

IPC: G06F9/50 ,  G06F9/30

CPC classification number: G06F9/5016 ,  G06F9/3009 ,  G06F9/5044

Abstract: Techniques for region-aware memory bandwidth allocation control are described. In an embodiment, an apparatus includes a processing core and control circuitry. The processing core is to execute a plurality of threads. The control circuitry is to control use of memory bandwidth per memory region and per thread.