公开(公告)号：US20210208656A1

公开(公告)日：2021-07-08

申请号：US16735563

申请日：2020-01-06

Applicant: Intel Corporation

Inventor： Alexander Uan-Zo-Li ,  Eugene Gorbatov ,  Harish Krishnamurthy ,  Alexander Lyakhov ,  Patrick Leung ,  Stephen Gunther ,  Arik Gihon ,  Khondker Ahmed ,  Philip Lehwalder ,  Sameer Shekhar ,  Vishram Pandit ,  Nimrod Angel ,  Michael Zelikson

IPC: G06F1/32 ,  G05F1/56

Abstract: A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.

公开(公告)号：US11429172B2

公开(公告)日：2022-08-30

申请号：US16735563

申请日：2020-01-06

Applicant: Intel Corporation

Inventor： Alexander Uan-Zo-Li ,  Eugene Gorbatov ,  Harish Krishnamurthy ,  Alexander Lyakhov ,  Patrick Leung ,  Stephen Gunther ,  Arik Gihon ,  Khondker Ahmed ,  Philip Lehwalder ,  Sameer Shekhar ,  Vishram Pandit ,  Nimrod Angel ,  Michael Zelikson

IPC: G06F1/32 ,  G05F1/56

Abstract: A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.