公开(公告)号：US20230090188A1

公开(公告)日：2023-03-23

申请号：US17481001

申请日：2021-09-21

Applicant: Intel Corporation

Inventor： Junxin WANG ,  Kemal AYGUN ,  Jieying KONG ,  Ala OMER ,  Whitney M. BRYKS

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/538

Abstract: An apparatus is described. The apparatus includes a semiconductor chip package substrate having alternating metal and dielectric layers. First and second ones of the dielectric layers that are directly above and directly below a first of the metal layers that is patterned to have supply and/or reference voltage structures have respectively higher dielectric constant (Dk) and higher dissipation factor (Df) than third and fourth ones of the dielectric layers that are directly above and directly below a second of the metal layers that is patterned to have signal wires that are to transport signals having a pulse width of 1 ns or less.

公开(公告)号：US20230207503A1

公开(公告)日：2023-06-29

申请号：US17561824

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Jieying KONG ,  Bainye Francoise ANGOUA ,  Dilan SENEVIRATNE ,  Whitney M. BRYKS ,  Jeremy D. ECTON

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/34 ,  H01L2224/73265 ,  H01L2924/186 ,  H01L2924/01029

Abstract: A system includes a metallic contact integrated onto a semiconductor integrated circuit substrate. The metallic contact has a contact surface to make electrical contact with a trace through a dielectric layer over the semiconductor circuit substrate and the metallic contact. The semiconductor circuit can include a trace that connects the contact to a package pad to enable external access to the signal from off the semiconductor circuit. The metallic contact includes a vertical lip extending vertically into the dielectric layer above the contact surface.