公开(公告)号：US20240420774A1

公开(公告)日：2024-12-19

申请号：US18815433

申请日：2024-08-26

Applicant: KIOXIA CORPORATION

Inventor： Jun NAKAI ,  Noboru SHIBATA

IPC: G11C16/16 ,  G11C16/14 ,  G11C16/26 ,  G11C16/34

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory cells arranged in a matrix. The control unit erases data of the memory cells. The control unit interrupts the erase operation of the memory cells and holds an erase condition before the interrupt in accordance with a first command during the erase operation, and resumes the erase operation based on the held erase condition in accordance with a second command.

公开(公告)号：US20230260577A1

公开(公告)日：2023-08-17

申请号：US18301800

申请日：2023-04-17

Applicant: KIOXIA CORPORATION

Inventor： Jun NAKAI ,  Noboru SHIBATA

IPC: G11C16/16 ,  G11C16/14 ,  G11C16/34 ,  G11C16/26

CPC classification number: G11C16/16 ,  G11C16/14 ,  G11C16/344 ,  G11C16/26 ,  G11C16/3445

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory cells arranged in a matrix. The control unit erases data of the memory cells. The control unit interrupts the erase operation of the memory cells and holds an erase condition before the interrupt in accordance with a first command during the erase operation, and resumes the erase operation based on the held erase condition in accordance with a second command.