公开(公告)号：US20230297239A1

公开(公告)日：2023-09-21

申请号：US17898370

申请日：2022-08-29

Applicant: KIOXIA CORPORATION

Inventor： Kenta SHIBASAKI ,  Yoshihiko SHINDO ,  Yasuhiro HIRASHIMA ,  Akio SUGAHARA ,  Shigeki NAGASAKA ,  Dai NAKAMURA ,  Yousuke HAGIWARA

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0679 ,  G06F3/0653

Abstract: A memory system includes a memory chip and a memory controller. The memory chip includes a storage region that stores setup data used for setup of the memory chip during power on thereof. The memory controller is configured to determine whether or not the memory controller has the setup data, when determining that the memory controller does not have the setup data, instruct the memory chip to read the setup data from the storage region and perform a first setup operation based on the read setup data, and when determining that the memory controller has the setup data, transmit the setup data to the memory chip and instruct the memory chip to perform a second setup operation based on the setup data received from the memory controller.

公开(公告)号：US20240320109A1

公开(公告)日：2024-09-26

申请号：US18590795

申请日：2024-02-28

Applicant: Kioxia Corporation

Inventor： Yoshihiko SHINDO

IPC: G06F11/16 ,  G06F11/07 ,  G06F11/10

CPC classification number: G06F11/1658 ,  G06F11/0772 ,  G06F11/1016

Abstract: A semiconductor memory device having first and second physical planes each including a plurality of physical blocks of memory cells, includes a first register in which a first address is to be stored, a second register in which a second address associated with the first address is to be stored, a third register in which third addresses are to be stored, and an address registration unit including a first circuit configured to compare the first address stored in the first register with the third addresses and store the first address in the second register as the second address if the first address does not match any of the third addresses, and a second circuit configured to convert the first address into another address that is stored in the second register as the second address when the first address matches one of the third addresses.