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公开(公告)号:US20170316731A1
公开(公告)日:2017-11-02
申请号:US15498584
申请日:2017-04-27
Applicant: LG Display Co., Ltd.
Inventor: SungHyun CHO , ChungSik KONG , Byoungwoo KIM , Sungwook CHANG , DongSoo KIM
CPC classification number: G09G3/2092 , G09G2300/0809 , G09G2310/0248 , G09G2310/0286 , G11C19/00 , G11C19/28
Abstract: Agate driving circuit and a display device are disclosed. The gate driving circuit includes a shift register including a plurality of stages. Among the stages, an Nth stage includes a first transistor charging a Q node and a junction stress control circuit. A pull-up transistor using the Q node as a gate input controls an output signal of a stage output terminal. The junction stress control circuit includes a first, second, and third control transistors. The first control transistor, the second control transistor, the third control transistor, and the first transistor are connected to each other through a common node. The second control transistor adjusts junction stresses for the first control transistor and the first transistor by controlling a voltage of the common node. When the second control transistor is turned off, the third control transistor discharges the voltage of the common node.
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公开(公告)号:US20170124972A1
公开(公告)日:2017-05-04
申请号:US15220911
申请日:2016-07-27
Applicant: LG DISPLAY CO., LTD.
Inventor: Byoungwoo KIM , SangHee YU
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2300/0434 , G09G2300/0465 , G09G2310/0286 , G09G2320/0209 , G09G2320/0223
Abstract: An array substrate includes: a display area; a non-display area outside of the display area; a gate-in-panel (GIP) circuit in the non-display area; a plurality of clock signal lines in the non-display area and configured to transfer signals to the GIP circuit; and connection lines in the non-display area and configured to connect the plurality of clock signal lines to the GIP circuit. Each of the plurality of clock signal lines is a ring shaped line.
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公开(公告)号:US20210066439A1
公开(公告)日:2021-03-04
申请号:US16945215
申请日:2020-07-31
Applicant: LG Display Co., Ltd.
Inventor: HongJae KIM , Hoon JEONG , Byoungwoo KIM
Abstract: Disclosed is a display apparatus in which a gate driving circuit is disposed in each of non-display areas other than a non-display area including a pad part among a plurality of non-display areas, and a plurality of connection lines provided on a layer differing from a plurality of gate lines and connected to the gate lines are provided.
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公开(公告)号:US20190019467A1
公开(公告)日:2019-01-17
申请号:US16134117
申请日:2018-09-18
Applicant: LG DISPLAY CO., LTD.
Inventor: Byoungwoo KIM , SangHee YU
IPC: G09G3/36
Abstract: An array substrate includes: a display area; a non-display area outside of the display area; a gate-in-panel (GIP) circuit in the non-display area; a plurality of clock signal lines in the non-display area and configured to transfer signals to the GIP circuit; and connection lines in the non-display area and configured to connect the plurality of clock signal lines to the GIP circuit. Each of the plurality of clock signal lines is a ring shaped line.
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公开(公告)号:US20160155409A1
公开(公告)日:2016-06-02
申请号:US14953614
申请日:2015-11-30
Applicant: LG Display Co., Ltd.
Inventor: Hun JEOUNG , Sanghee YU , Sunghyun CHO , Bosun LEE , Byoungwoo KIM , Sungwook CHANG
IPC: G09G5/00
CPC classification number: G09G5/003 , G09G3/3677 , G09G3/3696 , G09G2310/0251 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2310/063 , G09G2310/08 , G09G2320/0257 , G09G2330/027 , G09G2330/04 , G11C19/28
Abstract: A display panel and a method of driving the same are disclosed. The display panel includes a shift register with a plurality of stages configured to shift and to output a scan pulse for a plurality of scan lines. Each stage includes a pull-up transistor and a pull-down transistor coupled in series and defining an output node therebetween, a driver with a first node coupled to a gate electrode of the pull-up transistor and a second node coupled to a gate electrode of the pull-down transistor; and a node controller coupled to the first node, the second node, and the output node. In each stage, the node controller is configured to selectively apply a reference voltage at the first node and the second node in response to a control signal.
Abstract translation: 公开了一种显示面板及其驱动方法。 显示面板包括具有多个级的移位寄存器,配置为移位并输出多条扫描线的扫描脉冲。 每个级包括串联耦合并在其间限定输出节点的上拉晶体管和下拉晶体管,具有耦合到上拉晶体管的栅电极的第一节点的驱动器和耦合到栅电极的第二节点 的下拉晶体管; 以及耦合到所述第一节点,所述第二节点和所述输出节点的节点控制器。 在每个阶段,节点控制器被配置为响应于控制信号在第一节点和第二节点选择性地施加参考电压。
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